bl61x_pac/glb/
wifi_pll_config_2.rs

1#[doc = "Register `wifi_pll_config_2` reader"]
2pub type R = crate::R<WIFI_PLL_CONFIG_2_SPEC>;
3#[doc = "Register `wifi_pll_config_2` writer"]
4pub type W = crate::W<WIFI_PLL_CONFIG_2_SPEC>;
5#[doc = "Field `wifipll_sel_cp_bias` reader - "]
6pub type WIFIPLL_SEL_CP_BIAS_R = crate::BitReader;
7#[doc = "Field `wifipll_sel_cp_bias` writer - "]
8pub type WIFIPLL_SEL_CP_BIAS_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `wifipll_icp_5u` reader - "]
10pub type WIFIPLL_ICP_5U_R = crate::FieldReader;
11#[doc = "Field `wifipll_icp_5u` writer - "]
12pub type WIFIPLL_ICP_5U_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `wifipll_icp_1u` reader - "]
14pub type WIFIPLL_ICP_1U_R = crate::FieldReader;
15#[doc = "Field `wifipll_icp_1u` writer - "]
16pub type WIFIPLL_ICP_1U_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `wifipll_int_frac_sw` reader - "]
18pub type WIFIPLL_INT_FRAC_SW_R = crate::BitReader;
19#[doc = "Field `wifipll_int_frac_sw` writer - "]
20pub type WIFIPLL_INT_FRAC_SW_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `wifipll_cp_startup_en` reader - "]
22pub type WIFIPLL_CP_STARTUP_EN_R = crate::BitReader;
23#[doc = "Field `wifipll_cp_startup_en` writer - "]
24pub type WIFIPLL_CP_STARTUP_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `wifipll_cp_opamp_en` reader - "]
26pub type WIFIPLL_CP_OPAMP_EN_R = crate::BitReader;
27#[doc = "Field `wifipll_cp_opamp_en` writer - "]
28pub type WIFIPLL_CP_OPAMP_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30    #[doc = "Bit 0"]
31    #[inline(always)]
32    pub fn wifipll_sel_cp_bias(&self) -> WIFIPLL_SEL_CP_BIAS_R {
33        WIFIPLL_SEL_CP_BIAS_R::new((self.bits & 1) != 0)
34    }
35    #[doc = "Bits 4:5"]
36    #[inline(always)]
37    pub fn wifipll_icp_5u(&self) -> WIFIPLL_ICP_5U_R {
38        WIFIPLL_ICP_5U_R::new(((self.bits >> 4) & 3) as u8)
39    }
40    #[doc = "Bits 6:7"]
41    #[inline(always)]
42    pub fn wifipll_icp_1u(&self) -> WIFIPLL_ICP_1U_R {
43        WIFIPLL_ICP_1U_R::new(((self.bits >> 6) & 3) as u8)
44    }
45    #[doc = "Bit 8"]
46    #[inline(always)]
47    pub fn wifipll_int_frac_sw(&self) -> WIFIPLL_INT_FRAC_SW_R {
48        WIFIPLL_INT_FRAC_SW_R::new(((self.bits >> 8) & 1) != 0)
49    }
50    #[doc = "Bit 9"]
51    #[inline(always)]
52    pub fn wifipll_cp_startup_en(&self) -> WIFIPLL_CP_STARTUP_EN_R {
53        WIFIPLL_CP_STARTUP_EN_R::new(((self.bits >> 9) & 1) != 0)
54    }
55    #[doc = "Bit 10"]
56    #[inline(always)]
57    pub fn wifipll_cp_opamp_en(&self) -> WIFIPLL_CP_OPAMP_EN_R {
58        WIFIPLL_CP_OPAMP_EN_R::new(((self.bits >> 10) & 1) != 0)
59    }
60}
61impl W {
62    #[doc = "Bit 0"]
63    #[inline(always)]
64    #[must_use]
65    pub fn wifipll_sel_cp_bias(&mut self) -> WIFIPLL_SEL_CP_BIAS_W<WIFI_PLL_CONFIG_2_SPEC> {
66        WIFIPLL_SEL_CP_BIAS_W::new(self, 0)
67    }
68    #[doc = "Bits 4:5"]
69    #[inline(always)]
70    #[must_use]
71    pub fn wifipll_icp_5u(&mut self) -> WIFIPLL_ICP_5U_W<WIFI_PLL_CONFIG_2_SPEC> {
72        WIFIPLL_ICP_5U_W::new(self, 4)
73    }
74    #[doc = "Bits 6:7"]
75    #[inline(always)]
76    #[must_use]
77    pub fn wifipll_icp_1u(&mut self) -> WIFIPLL_ICP_1U_W<WIFI_PLL_CONFIG_2_SPEC> {
78        WIFIPLL_ICP_1U_W::new(self, 6)
79    }
80    #[doc = "Bit 8"]
81    #[inline(always)]
82    #[must_use]
83    pub fn wifipll_int_frac_sw(&mut self) -> WIFIPLL_INT_FRAC_SW_W<WIFI_PLL_CONFIG_2_SPEC> {
84        WIFIPLL_INT_FRAC_SW_W::new(self, 8)
85    }
86    #[doc = "Bit 9"]
87    #[inline(always)]
88    #[must_use]
89    pub fn wifipll_cp_startup_en(&mut self) -> WIFIPLL_CP_STARTUP_EN_W<WIFI_PLL_CONFIG_2_SPEC> {
90        WIFIPLL_CP_STARTUP_EN_W::new(self, 9)
91    }
92    #[doc = "Bit 10"]
93    #[inline(always)]
94    #[must_use]
95    pub fn wifipll_cp_opamp_en(&mut self) -> WIFIPLL_CP_OPAMP_EN_W<WIFI_PLL_CONFIG_2_SPEC> {
96        WIFIPLL_CP_OPAMP_EN_W::new(self, 10)
97    }
98    #[doc = r" Writes raw bits to the register."]
99    #[doc = r""]
100    #[doc = r" # Safety"]
101    #[doc = r""]
102    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
103    #[inline(always)]
104    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
105        self.bits = bits;
106        self
107    }
108}
109#[doc = "Wireless Fidelity Phase-Locked Loop configuration 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wifi_pll_config_2::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wifi_pll_config_2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
110pub struct WIFI_PLL_CONFIG_2_SPEC;
111impl crate::RegisterSpec for WIFI_PLL_CONFIG_2_SPEC {
112    type Ux = u32;
113}
114#[doc = "`read()` method returns [`wifi_pll_config_2::R`](R) reader structure"]
115impl crate::Readable for WIFI_PLL_CONFIG_2_SPEC {}
116#[doc = "`write(|w| ..)` method takes [`wifi_pll_config_2::W`](W) writer structure"]
117impl crate::Writable for WIFI_PLL_CONFIG_2_SPEC {
118    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
119    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120}
121#[doc = "`reset()` method sets wifi_pll_config_2 to value 0"]
122impl crate::Resettable for WIFI_PLL_CONFIG_2_SPEC {
123    const RESET_VALUE: Self::Ux = 0;
124}