bl61x_pac/glb/
dma_config_0.rs1#[doc = "Register `dma_config_0` reader"]
2pub type R = crate::R<DMA_CONFIG_0_SPEC>;
3#[doc = "Register `dma_config_0` writer"]
4pub type W = crate::W<DMA_CONFIG_0_SPEC>;
5#[doc = "Field `dma_clk_en` reader - "]
6pub type DMA_CLK_EN_R = crate::FieldReader;
7#[doc = "Field `dma_clk_en` writer - "]
8pub type DMA_CLK_EN_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9impl R {
10 #[doc = "Bits 24:31"]
11 #[inline(always)]
12 pub fn dma_clk_en(&self) -> DMA_CLK_EN_R {
13 DMA_CLK_EN_R::new(((self.bits >> 24) & 0xff) as u8)
14 }
15}
16impl W {
17 #[doc = "Bits 24:31"]
18 #[inline(always)]
19 #[must_use]
20 pub fn dma_clk_en(&mut self) -> DMA_CLK_EN_W<DMA_CONFIG_0_SPEC> {
21 DMA_CLK_EN_W::new(self, 24)
22 }
23 #[doc = r" Writes raw bits to the register."]
24 #[doc = r""]
25 #[doc = r" # Safety"]
26 #[doc = r""]
27 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
28 #[inline(always)]
29 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
30 self.bits = bits;
31 self
32 }
33}
34#[doc = "Direct Memory Access configuration 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_config_0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_config_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
35pub struct DMA_CONFIG_0_SPEC;
36impl crate::RegisterSpec for DMA_CONFIG_0_SPEC {
37 type Ux = u32;
38}
39#[doc = "`read()` method returns [`dma_config_0::R`](R) reader structure"]
40impl crate::Readable for DMA_CONFIG_0_SPEC {}
41#[doc = "`write(|w| ..)` method takes [`dma_config_0::W`](W) writer structure"]
42impl crate::Writable for DMA_CONFIG_0_SPEC {
43 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
44 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
45}
46#[doc = "`reset()` method sets dma_config_0 to value 0"]
47impl crate::Resettable for DMA_CONFIG_0_SPEC {
48 const RESET_VALUE: Self::Ux = 0;
49}