bl61x_pac/aon/
aon_common.rs

1#[doc = "Register `aon_common` reader"]
2pub type R = crate::R<AON_COMMON_SPEC>;
3#[doc = "Register `aon_common` writer"]
4pub type W = crate::W<AON_COMMON_SPEC>;
5#[doc = "Field `tmux_aon` reader - "]
6pub type TMUX_AON_R = crate::FieldReader;
7#[doc = "Field `tmux_aon` writer - "]
8pub type TMUX_AON_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `ten_aon` reader - "]
10pub type TEN_AON_R = crate::BitReader;
11#[doc = "Field `ten_aon` writer - "]
12pub type TEN_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `ten_vddcore_aon` reader - "]
14pub type TEN_VDDCORE_AON_R = crate::BitReader;
15#[doc = "Field `ten_vddcore_aon` writer - "]
16pub type TEN_VDDCORE_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ten_ldo11soc_aon` reader - "]
18pub type TEN_LDO11SOC_AON_R = crate::BitReader;
19#[doc = "Field `ten_ldo11soc_aon` writer - "]
20pub type TEN_LDO11SOC_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `ten_dcdc_0_aon` reader - "]
22pub type TEN_DCDC_0_AON_R = crate::BitReader;
23#[doc = "Field `ten_dcdc_0_aon` writer - "]
24pub type TEN_DCDC_0_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ten_dcdc_1_aon` reader - "]
26pub type TEN_DCDC_1_AON_R = crate::BitReader;
27#[doc = "Field `ten_dcdc_1_aon` writer - "]
28pub type TEN_DCDC_1_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `ten_bg_sys_aon` reader - "]
30pub type TEN_BG_SYS_AON_R = crate::BitReader;
31#[doc = "Field `ten_bg_sys_aon` writer - "]
32pub type TEN_BG_SYS_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `ten_ldo15rf_aon` reader - "]
34pub type TEN_LDO15RF_AON_R = crate::BitReader;
35#[doc = "Field `ten_ldo15rf_aon` writer - "]
36pub type TEN_LDO15RF_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `ten_xtal_aon` reader - "]
38pub type TEN_XTAL_AON_R = crate::BitReader;
39#[doc = "Field `ten_xtal_aon` writer - "]
40pub type TEN_XTAL_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `dten_xtal_aon` reader - "]
42pub type DTEN_XTAL_AON_R = crate::BitReader;
43#[doc = "Field `dten_xtal_aon` writer - "]
44pub type DTEN_XTAL_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `ten_mbg_aon` reader - "]
46pub type TEN_MBG_AON_R = crate::BitReader;
47#[doc = "Field `ten_mbg_aon` writer - "]
48pub type TEN_MBG_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `ten_cip_misc_aon` reader - "]
50pub type TEN_CIP_MISC_AON_R = crate::BitReader;
51#[doc = "Field `ten_cip_misc_aon` writer - "]
52pub type TEN_CIP_MISC_AON_W<'a, REG> = crate::BitWriter<'a, REG>;
53impl R {
54    #[doc = "Bits 0:2"]
55    #[inline(always)]
56    pub fn tmux_aon(&self) -> TMUX_AON_R {
57        TMUX_AON_R::new((self.bits & 7) as u8)
58    }
59    #[doc = "Bit 4"]
60    #[inline(always)]
61    pub fn ten_aon(&self) -> TEN_AON_R {
62        TEN_AON_R::new(((self.bits >> 4) & 1) != 0)
63    }
64    #[doc = "Bit 8"]
65    #[inline(always)]
66    pub fn ten_vddcore_aon(&self) -> TEN_VDDCORE_AON_R {
67        TEN_VDDCORE_AON_R::new(((self.bits >> 8) & 1) != 0)
68    }
69    #[doc = "Bit 9"]
70    #[inline(always)]
71    pub fn ten_ldo11soc_aon(&self) -> TEN_LDO11SOC_AON_R {
72        TEN_LDO11SOC_AON_R::new(((self.bits >> 9) & 1) != 0)
73    }
74    #[doc = "Bit 10"]
75    #[inline(always)]
76    pub fn ten_dcdc_0_aon(&self) -> TEN_DCDC_0_AON_R {
77        TEN_DCDC_0_AON_R::new(((self.bits >> 10) & 1) != 0)
78    }
79    #[doc = "Bit 11"]
80    #[inline(always)]
81    pub fn ten_dcdc_1_aon(&self) -> TEN_DCDC_1_AON_R {
82        TEN_DCDC_1_AON_R::new(((self.bits >> 11) & 1) != 0)
83    }
84    #[doc = "Bit 12"]
85    #[inline(always)]
86    pub fn ten_bg_sys_aon(&self) -> TEN_BG_SYS_AON_R {
87        TEN_BG_SYS_AON_R::new(((self.bits >> 12) & 1) != 0)
88    }
89    #[doc = "Bit 16"]
90    #[inline(always)]
91    pub fn ten_ldo15rf_aon(&self) -> TEN_LDO15RF_AON_R {
92        TEN_LDO15RF_AON_R::new(((self.bits >> 16) & 1) != 0)
93    }
94    #[doc = "Bit 17"]
95    #[inline(always)]
96    pub fn ten_xtal_aon(&self) -> TEN_XTAL_AON_R {
97        TEN_XTAL_AON_R::new(((self.bits >> 17) & 1) != 0)
98    }
99    #[doc = "Bit 18"]
100    #[inline(always)]
101    pub fn dten_xtal_aon(&self) -> DTEN_XTAL_AON_R {
102        DTEN_XTAL_AON_R::new(((self.bits >> 18) & 1) != 0)
103    }
104    #[doc = "Bit 19"]
105    #[inline(always)]
106    pub fn ten_mbg_aon(&self) -> TEN_MBG_AON_R {
107        TEN_MBG_AON_R::new(((self.bits >> 19) & 1) != 0)
108    }
109    #[doc = "Bit 20"]
110    #[inline(always)]
111    pub fn ten_cip_misc_aon(&self) -> TEN_CIP_MISC_AON_R {
112        TEN_CIP_MISC_AON_R::new(((self.bits >> 20) & 1) != 0)
113    }
114}
115impl W {
116    #[doc = "Bits 0:2"]
117    #[inline(always)]
118    #[must_use]
119    pub fn tmux_aon(&mut self) -> TMUX_AON_W<AON_COMMON_SPEC> {
120        TMUX_AON_W::new(self, 0)
121    }
122    #[doc = "Bit 4"]
123    #[inline(always)]
124    #[must_use]
125    pub fn ten_aon(&mut self) -> TEN_AON_W<AON_COMMON_SPEC> {
126        TEN_AON_W::new(self, 4)
127    }
128    #[doc = "Bit 8"]
129    #[inline(always)]
130    #[must_use]
131    pub fn ten_vddcore_aon(&mut self) -> TEN_VDDCORE_AON_W<AON_COMMON_SPEC> {
132        TEN_VDDCORE_AON_W::new(self, 8)
133    }
134    #[doc = "Bit 9"]
135    #[inline(always)]
136    #[must_use]
137    pub fn ten_ldo11soc_aon(&mut self) -> TEN_LDO11SOC_AON_W<AON_COMMON_SPEC> {
138        TEN_LDO11SOC_AON_W::new(self, 9)
139    }
140    #[doc = "Bit 10"]
141    #[inline(always)]
142    #[must_use]
143    pub fn ten_dcdc_0_aon(&mut self) -> TEN_DCDC_0_AON_W<AON_COMMON_SPEC> {
144        TEN_DCDC_0_AON_W::new(self, 10)
145    }
146    #[doc = "Bit 11"]
147    #[inline(always)]
148    #[must_use]
149    pub fn ten_dcdc_1_aon(&mut self) -> TEN_DCDC_1_AON_W<AON_COMMON_SPEC> {
150        TEN_DCDC_1_AON_W::new(self, 11)
151    }
152    #[doc = "Bit 12"]
153    #[inline(always)]
154    #[must_use]
155    pub fn ten_bg_sys_aon(&mut self) -> TEN_BG_SYS_AON_W<AON_COMMON_SPEC> {
156        TEN_BG_SYS_AON_W::new(self, 12)
157    }
158    #[doc = "Bit 16"]
159    #[inline(always)]
160    #[must_use]
161    pub fn ten_ldo15rf_aon(&mut self) -> TEN_LDO15RF_AON_W<AON_COMMON_SPEC> {
162        TEN_LDO15RF_AON_W::new(self, 16)
163    }
164    #[doc = "Bit 17"]
165    #[inline(always)]
166    #[must_use]
167    pub fn ten_xtal_aon(&mut self) -> TEN_XTAL_AON_W<AON_COMMON_SPEC> {
168        TEN_XTAL_AON_W::new(self, 17)
169    }
170    #[doc = "Bit 18"]
171    #[inline(always)]
172    #[must_use]
173    pub fn dten_xtal_aon(&mut self) -> DTEN_XTAL_AON_W<AON_COMMON_SPEC> {
174        DTEN_XTAL_AON_W::new(self, 18)
175    }
176    #[doc = "Bit 19"]
177    #[inline(always)]
178    #[must_use]
179    pub fn ten_mbg_aon(&mut self) -> TEN_MBG_AON_W<AON_COMMON_SPEC> {
180        TEN_MBG_AON_W::new(self, 19)
181    }
182    #[doc = "Bit 20"]
183    #[inline(always)]
184    #[must_use]
185    pub fn ten_cip_misc_aon(&mut self) -> TEN_CIP_MISC_AON_W<AON_COMMON_SPEC> {
186        TEN_CIP_MISC_AON_W::new(self, 20)
187    }
188    #[doc = r" Writes raw bits to the register."]
189    #[doc = r""]
190    #[doc = r" # Safety"]
191    #[doc = r""]
192    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
193    #[inline(always)]
194    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
195        self.bits = bits;
196        self
197    }
198}
199#[doc = "aon_common.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aon_common::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aon_common::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
200pub struct AON_COMMON_SPEC;
201impl crate::RegisterSpec for AON_COMMON_SPEC {
202    type Ux = u32;
203}
204#[doc = "`read()` method returns [`aon_common::R`](R) reader structure"]
205impl crate::Readable for AON_COMMON_SPEC {}
206#[doc = "`write(|w| ..)` method takes [`aon_common::W`](W) writer structure"]
207impl crate::Writable for AON_COMMON_SPEC {
208    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
209    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
210}
211#[doc = "`reset()` method sets aon_common to value 0"]
212impl crate::Resettable for AON_COMMON_SPEC {
213    const RESET_VALUE: Self::Ux = 0;
214}