bl61x_pac/uart/
interrupt_state.rs

1#[doc = "Register `interrupt_state` reader"]
2pub type R = crate::R<INTERRUPT_STATE_SPEC>;
3#[doc = "Field `transmit_transfer` reader - Transmit transfer finish signal raised"]
4pub use AUTO_BAUDRATE_FIVE_FIVE_R as TRANSMIT_TRANSFER_R;
5#[doc = "Field `receive_transfer` reader - Receive transfer finish signal raised"]
6pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_TRANSFER_R;
7#[doc = "Field `transmit_fifo_ready` reader - Transmit FIFO ready signal raised"]
8pub use AUTO_BAUDRATE_FIVE_FIVE_R as TRANSMIT_FIFO_READY_R;
9#[doc = "Field `receive_fifo_ready` reader - Receive FIFO ready signal raised"]
10pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_FIFO_READY_R;
11#[doc = "Field `receive_timeout` reader - Receive timed-out interrupt occurred"]
12pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_TIMEOUT_R;
13#[doc = "Field `receive_parity` reader - Receive parity check failure occurred"]
14pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_PARITY_R;
15#[doc = "Field `transmit_fifo_error` reader - Transmit FIFO overflow or underflow occurred"]
16pub use AUTO_BAUDRATE_FIVE_FIVE_R as TRANSMIT_FIFO_ERROR_R;
17#[doc = "Field `receive_fifo_error` reader - Receive FIFO overflow or underflow occurred"]
18pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_FIFO_ERROR_R;
19#[doc = "Field `receive_sync_error` reader - Receive LIN mode synchronization field error occurred"]
20pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_SYNC_ERROR_R;
21#[doc = "Field `receive_byte_count` reader - Receive byte count reached occurred"]
22pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_BYTE_COUNT_R;
23#[doc = "Field `auto_baudrate_start_bit` reader - Receive auto baudrate detection finished using start bit occurred"]
24pub use AUTO_BAUDRATE_FIVE_FIVE_R as AUTO_BAUDRATE_START_BIT_R;
25#[doc = "Field `auto_baudrate_five_five` reader - Receive auto baudrate detection finished using 0x55 occurred"]
26pub type AUTO_BAUDRATE_FIVE_FIVE_R = crate::BitReader<INTERRUPT_STATE_A>;
27#[doc = "Receive auto baudrate detection finished using 0x55 occurred\n\nValue on reset: 0"]
28#[derive(Clone, Copy, Debug, PartialEq, Eq)]
29pub enum INTERRUPT_STATE_A {
30    #[doc = "1: Has interrupt"]
31    HAS_INTERRUPT = 1,
32    #[doc = "0: No interrupt occurred"]
33    NO_INTERRUPT = 0,
34}
35impl From<INTERRUPT_STATE_A> for bool {
36    #[inline(always)]
37    fn from(variant: INTERRUPT_STATE_A) -> Self {
38        variant as u8 != 0
39    }
40}
41impl AUTO_BAUDRATE_FIVE_FIVE_R {
42    #[doc = "Get enumerated values variant"]
43    #[inline(always)]
44    pub const fn variant(&self) -> INTERRUPT_STATE_A {
45        match self.bits {
46            true => INTERRUPT_STATE_A::HAS_INTERRUPT,
47            false => INTERRUPT_STATE_A::NO_INTERRUPT,
48        }
49    }
50    #[doc = "Has interrupt"]
51    #[inline(always)]
52    pub fn is_has_interrupt(&self) -> bool {
53        *self == INTERRUPT_STATE_A::HAS_INTERRUPT
54    }
55    #[doc = "No interrupt occurred"]
56    #[inline(always)]
57    pub fn is_no_interrupt(&self) -> bool {
58        *self == INTERRUPT_STATE_A::NO_INTERRUPT
59    }
60}
61impl R {
62    #[doc = "Bit 0 - Transmit transfer finish signal raised"]
63    #[inline(always)]
64    pub fn transmit_transfer(&self) -> TRANSMIT_TRANSFER_R {
65        TRANSMIT_TRANSFER_R::new((self.bits & 1) != 0)
66    }
67    #[doc = "Bit 1 - Receive transfer finish signal raised"]
68    #[inline(always)]
69    pub fn receive_transfer(&self) -> RECEIVE_TRANSFER_R {
70        RECEIVE_TRANSFER_R::new(((self.bits >> 1) & 1) != 0)
71    }
72    #[doc = "Bit 2 - Transmit FIFO ready signal raised"]
73    #[inline(always)]
74    pub fn transmit_fifo_ready(&self) -> TRANSMIT_FIFO_READY_R {
75        TRANSMIT_FIFO_READY_R::new(((self.bits >> 2) & 1) != 0)
76    }
77    #[doc = "Bit 3 - Receive FIFO ready signal raised"]
78    #[inline(always)]
79    pub fn receive_fifo_ready(&self) -> RECEIVE_FIFO_READY_R {
80        RECEIVE_FIFO_READY_R::new(((self.bits >> 3) & 1) != 0)
81    }
82    #[doc = "Bit 4 - Receive timed-out interrupt occurred"]
83    #[inline(always)]
84    pub fn receive_timeout(&self) -> RECEIVE_TIMEOUT_R {
85        RECEIVE_TIMEOUT_R::new(((self.bits >> 4) & 1) != 0)
86    }
87    #[doc = "Bit 5 - Receive parity check failure occurred"]
88    #[inline(always)]
89    pub fn receive_parity(&self) -> RECEIVE_PARITY_R {
90        RECEIVE_PARITY_R::new(((self.bits >> 5) & 1) != 0)
91    }
92    #[doc = "Bit 6 - Transmit FIFO overflow or underflow occurred"]
93    #[inline(always)]
94    pub fn transmit_fifo_error(&self) -> TRANSMIT_FIFO_ERROR_R {
95        TRANSMIT_FIFO_ERROR_R::new(((self.bits >> 6) & 1) != 0)
96    }
97    #[doc = "Bit 7 - Receive FIFO overflow or underflow occurred"]
98    #[inline(always)]
99    pub fn receive_fifo_error(&self) -> RECEIVE_FIFO_ERROR_R {
100        RECEIVE_FIFO_ERROR_R::new(((self.bits >> 7) & 1) != 0)
101    }
102    #[doc = "Bit 8 - Receive LIN mode synchronization field error occurred"]
103    #[inline(always)]
104    pub fn receive_sync_error(&self) -> RECEIVE_SYNC_ERROR_R {
105        RECEIVE_SYNC_ERROR_R::new(((self.bits >> 8) & 1) != 0)
106    }
107    #[doc = "Bit 9 - Receive byte count reached occurred"]
108    #[inline(always)]
109    pub fn receive_byte_count(&self) -> RECEIVE_BYTE_COUNT_R {
110        RECEIVE_BYTE_COUNT_R::new(((self.bits >> 9) & 1) != 0)
111    }
112    #[doc = "Bit 10 - Receive auto baudrate detection finished using start bit occurred"]
113    #[inline(always)]
114    pub fn auto_baudrate_start_bit(&self) -> AUTO_BAUDRATE_START_BIT_R {
115        AUTO_BAUDRATE_START_BIT_R::new(((self.bits >> 10) & 1) != 0)
116    }
117    #[doc = "Bit 11 - Receive auto baudrate detection finished using 0x55 occurred"]
118    #[inline(always)]
119    pub fn auto_baudrate_five_five(&self) -> AUTO_BAUDRATE_FIVE_FIVE_R {
120        AUTO_BAUDRATE_FIVE_FIVE_R::new(((self.bits >> 11) & 1) != 0)
121    }
122}
123#[doc = "Interrupt state register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_state::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
124pub struct INTERRUPT_STATE_SPEC;
125impl crate::RegisterSpec for INTERRUPT_STATE_SPEC {
126    type Ux = u32;
127}
128#[doc = "`read()` method returns [`interrupt_state::R`](R) reader structure"]
129impl crate::Readable for INTERRUPT_STATE_SPEC {}
130#[doc = "`reset()` method sets interrupt_state to value 0x04"]
131impl crate::Resettable for INTERRUPT_STATE_SPEC {
132    const RESET_VALUE: Self::Ux = 0x04;
133}
bl61x_pac/uart/interrupt_state.rs

bl61x_pac/uart/
interrupt_state.rs
