bl61x_pac/
spi.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    config: CONFIG,
5    interrupt_state: INTERRUPT_STATE,
6    bus_busy: BUS_BUSY,
7    _reserved3: [u8; 0x04],
8    period_control: PERIOD_CONTROL,
9    period_interval: PERIOD_INTERVAL,
10    ignore_index: IGNORE_INDEX,
11    timeout: TIMEOUT,
12    _reserved7: [u8; 0x60],
13    fifo_config_0: FIFO_CONFIG_0,
14    fifo_config_1: FIFO_CONFIG_1,
15    data_write: DATA_WRITE,
16    data_read: DATA_READ,
17}
18impl RegisterBlock {
19    #[doc = "0x00 - Function configuration register"]
20    #[inline(always)]
21    pub const fn config(&self) -> &CONFIG {
22        &self.config
23    }
24    #[doc = "0x04 - Interrupt enables, masks and states"]
25    #[inline(always)]
26    pub const fn interrupt_state(&self) -> &INTERRUPT_STATE {
27        &self.interrupt_state
28    }
29    #[doc = "0x08 - Bus busy state indicator"]
30    #[inline(always)]
31    pub const fn bus_busy(&self) -> &BUS_BUSY {
32        &self.bus_busy
33    }
34    #[doc = "0x10 - Duration of control signals"]
35    #[inline(always)]
36    pub const fn period_control(&self) -> &PERIOD_CONTROL {
37        &self.period_control
38    }
39    #[doc = "0x14 - Interval bitween frames"]
40    #[inline(always)]
41    pub const fn period_interval(&self) -> &PERIOD_INTERVAL {
42        &self.period_interval
43    }
44    #[doc = "0x18 - Receive ignore index configuration"]
45    #[inline(always)]
46    pub const fn ignore_index(&self) -> &IGNORE_INDEX {
47        &self.ignore_index
48    }
49    #[doc = "0x1c - Slave mode transmit timeout values"]
50    #[inline(always)]
51    pub const fn timeout(&self) -> &TIMEOUT {
52        &self.timeout
53    }
54    #[doc = "0x80 - FIFO configuration register 0"]
55    #[inline(always)]
56    pub const fn fifo_config_0(&self) -> &FIFO_CONFIG_0 {
57        &self.fifo_config_0
58    }
59    #[doc = "0x84 - FIFO configuration register 1"]
60    #[inline(always)]
61    pub const fn fifo_config_1(&self) -> &FIFO_CONFIG_1 {
62        &self.fifo_config_1
63    }
64    #[doc = "0x88 - FIFO write data register"]
65    #[inline(always)]
66    pub const fn data_write(&self) -> &DATA_WRITE {
67        &self.data_write
68    }
69    #[doc = "0x8c - FIFO read data register"]
70    #[inline(always)]
71    pub const fn data_read(&self) -> &DATA_READ {
72        &self.data_read
73    }
74}
75#[doc = "config (rw) register accessor: Function configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`config::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@config`]
76module"]
77pub type CONFIG = crate::Reg<config::CONFIG_SPEC>;
78#[doc = "Function configuration register"]
79pub mod config;
80#[doc = "interrupt_state (rw) register accessor: Interrupt enables, masks and states\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`interrupt_state::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interrupt_state::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_state`]
81module"]
82pub type INTERRUPT_STATE = crate::Reg<interrupt_state::INTERRUPT_STATE_SPEC>;
83#[doc = "Interrupt enables, masks and states"]
84pub mod interrupt_state;
85#[doc = "bus_busy (rw) register accessor: Bus busy state indicator\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bus_busy::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bus_busy::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bus_busy`]
86module"]
87pub type BUS_BUSY = crate::Reg<bus_busy::BUS_BUSY_SPEC>;
88#[doc = "Bus busy state indicator"]
89pub mod bus_busy;
90#[doc = "period_control (rw) register accessor: Duration of control signals\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`period_control::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`period_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@period_control`]
91module"]
92pub type PERIOD_CONTROL = crate::Reg<period_control::PERIOD_CONTROL_SPEC>;
93#[doc = "Duration of control signals"]
94pub mod period_control;
95#[doc = "period_interval (rw) register accessor: Interval bitween frames\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`period_interval::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`period_interval::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@period_interval`]
96module"]
97pub type PERIOD_INTERVAL = crate::Reg<period_interval::PERIOD_INTERVAL_SPEC>;
98#[doc = "Interval bitween frames"]
99pub mod period_interval;
100#[doc = "ignore_index (rw) register accessor: Receive ignore index configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ignore_index::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ignore_index::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ignore_index`]
101module"]
102pub type IGNORE_INDEX = crate::Reg<ignore_index::IGNORE_INDEX_SPEC>;
103#[doc = "Receive ignore index configuration"]
104pub mod ignore_index;
105#[doc = "timeout (rw) register accessor: Slave mode transmit timeout values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timeout::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timeout::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timeout`]
106module"]
107pub type TIMEOUT = crate::Reg<timeout::TIMEOUT_SPEC>;
108#[doc = "Slave mode transmit timeout values"]
109pub mod timeout;
110#[doc = "fifo_config_0 (rw) register accessor: FIFO configuration register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_config_0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_config_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_config_0`]
111module"]
112pub type FIFO_CONFIG_0 = crate::Reg<fifo_config_0::FIFO_CONFIG_0_SPEC>;
113#[doc = "FIFO configuration register 0"]
114pub mod fifo_config_0;
115#[doc = "fifo_config_1 (rw) register accessor: FIFO configuration register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo_config_1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_config_1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo_config_1`]
116module"]
117pub type FIFO_CONFIG_1 = crate::Reg<fifo_config_1::FIFO_CONFIG_1_SPEC>;
118#[doc = "FIFO configuration register 1"]
119pub mod fifo_config_1;
120#[doc = "data_write (rw) register accessor: FIFO write data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data_write::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data_write::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data_write`]
121module"]
122pub type DATA_WRITE = crate::Reg<data_write::DATA_WRITE_SPEC>;
123#[doc = "FIFO write data register"]
124pub mod data_write;
125#[doc = "data_read (rw) register accessor: FIFO read data register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data_read::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data_read::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data_read`]
126module"]
127pub type DATA_READ = crate::Reg<data_read::DATA_READ_SPEC>;
128#[doc = "FIFO read data register"]
129pub mod data_read;