bl61x_pac/mcu_misc/
mcu1_log5.rs

1#[doc = "Register `mcu1_log5` reader"]
2pub type R = crate::R<MCU1_LOG5_SPEC>;
3#[doc = "Register `mcu1_log5` writer"]
4pub type W = crate::W<MCU1_LOG5_SPEC>;
5#[doc = "Field `sts_mcu1_lockup` reader - MCU1 lockup status. This bit is set when MCU1 is in a lockup state."]
6pub type STS_MCU1_LOCKUP_R = crate::BitReader;
7#[doc = "Field `sts_mcu1_lockup` writer - MCU1 lockup status. This bit is set when MCU1 is in a lockup state."]
8pub type STS_MCU1_LOCKUP_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `sts_mcu1_halted` reader - MCU1 halted status. This bit is set when MCU1 is in a halted state."]
10pub type STS_MCU1_HALTED_R = crate::BitReader;
11#[doc = "Field `sts_mcu1_halted` writer - MCU1 halted status. This bit is set when MCU1 is in a halted state."]
12pub type STS_MCU1_HALTED_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `mcu1_ndm_rstn_req` reader - MCU1 NDM reset request. Writing 1 to this bit requests a NDM reset for MCU1."]
14pub type MCU1_NDM_RSTN_REQ_R = crate::BitReader;
15#[doc = "Field `mcu1_ndm_rstn_req` writer - MCU1 NDM reset request. Writing 1 to this bit requests a NDM reset for MCU1."]
16pub type MCU1_NDM_RSTN_REQ_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `mcu1_hart_rstn_req` reader - MCU1 hart reset request. Writing 1 to this bit requests a hart reset for MCU1."]
18pub type MCU1_HART_RSTN_REQ_R = crate::BitReader;
19#[doc = "Field `mcu1_hart_rstn_req` writer - MCU1 hart reset request. Writing 1 to this bit requests a hart reset for MCU1."]
20pub type MCU1_HART_RSTN_REQ_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bit 24 - MCU1 lockup status. This bit is set when MCU1 is in a lockup state."]
23    #[inline(always)]
24    pub fn sts_mcu1_lockup(&self) -> STS_MCU1_LOCKUP_R {
25        STS_MCU1_LOCKUP_R::new(((self.bits >> 24) & 1) != 0)
26    }
27    #[doc = "Bit 25 - MCU1 halted status. This bit is set when MCU1 is in a halted state."]
28    #[inline(always)]
29    pub fn sts_mcu1_halted(&self) -> STS_MCU1_HALTED_R {
30        STS_MCU1_HALTED_R::new(((self.bits >> 25) & 1) != 0)
31    }
32    #[doc = "Bit 28 - MCU1 NDM reset request. Writing 1 to this bit requests a NDM reset for MCU1."]
33    #[inline(always)]
34    pub fn mcu1_ndm_rstn_req(&self) -> MCU1_NDM_RSTN_REQ_R {
35        MCU1_NDM_RSTN_REQ_R::new(((self.bits >> 28) & 1) != 0)
36    }
37    #[doc = "Bit 29 - MCU1 hart reset request. Writing 1 to this bit requests a hart reset for MCU1."]
38    #[inline(always)]
39    pub fn mcu1_hart_rstn_req(&self) -> MCU1_HART_RSTN_REQ_R {
40        MCU1_HART_RSTN_REQ_R::new(((self.bits >> 29) & 1) != 0)
41    }
42}
43impl W {
44    #[doc = "Bit 24 - MCU1 lockup status. This bit is set when MCU1 is in a lockup state."]
45    #[inline(always)]
46    #[must_use]
47    pub fn sts_mcu1_lockup(&mut self) -> STS_MCU1_LOCKUP_W<MCU1_LOG5_SPEC> {
48        STS_MCU1_LOCKUP_W::new(self, 24)
49    }
50    #[doc = "Bit 25 - MCU1 halted status. This bit is set when MCU1 is in a halted state."]
51    #[inline(always)]
52    #[must_use]
53    pub fn sts_mcu1_halted(&mut self) -> STS_MCU1_HALTED_W<MCU1_LOG5_SPEC> {
54        STS_MCU1_HALTED_W::new(self, 25)
55    }
56    #[doc = "Bit 28 - MCU1 NDM reset request. Writing 1 to this bit requests a NDM reset for MCU1."]
57    #[inline(always)]
58    #[must_use]
59    pub fn mcu1_ndm_rstn_req(&mut self) -> MCU1_NDM_RSTN_REQ_W<MCU1_LOG5_SPEC> {
60        MCU1_NDM_RSTN_REQ_W::new(self, 28)
61    }
62    #[doc = "Bit 29 - MCU1 hart reset request. Writing 1 to this bit requests a hart reset for MCU1."]
63    #[inline(always)]
64    #[must_use]
65    pub fn mcu1_hart_rstn_req(&mut self) -> MCU1_HART_RSTN_REQ_W<MCU1_LOG5_SPEC> {
66        MCU1_HART_RSTN_REQ_W::new(self, 29)
67    }
68    #[doc = r" Writes raw bits to the register."]
69    #[doc = r""]
70    #[doc = r" # Safety"]
71    #[doc = r""]
72    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
73    #[inline(always)]
74    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
75        self.bits = bits;
76        self
77    }
78}
79#[doc = "MCU1 Log 5 Register. Stores information about the last MCU1 lockup and halt status.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcu1_log5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcu1_log5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct MCU1_LOG5_SPEC;
81impl crate::RegisterSpec for MCU1_LOG5_SPEC {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`mcu1_log5::R`](R) reader structure"]
85impl crate::Readable for MCU1_LOG5_SPEC {}
86#[doc = "`write(|w| ..)` method takes [`mcu1_log5::W`](W) writer structure"]
87impl crate::Writable for MCU1_LOG5_SPEC {
88    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
89    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
90}
91#[doc = "`reset()` method sets mcu1_log5 to value 0"]
92impl crate::Resettable for MCU1_LOG5_SPEC {
93    const RESET_VALUE: Self::Ux = 0;
94}
bl61x_pac/mcu_misc/mcu1_log5.rs

bl61x_pac/mcu_misc/
mcu1_log5.rs
