1#[doc = "Register `ldo18` reader"]
2pub type R = crate::R<LDO18_SPEC>;
3#[doc = "Register `ldo18` writer"]
4pub type W = crate::W<LDO18_SPEC>;
5#[doc = "Field `pu_ldo18io` reader - "]
6pub type PU_LDO18IO_R = crate::BitReader;
7#[doc = "Field `pu_ldo18io` writer - "]
8pub type PU_LDO18IO_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ldo18io_bypass` reader - "]
10pub type LDO18IO_BYPASS_R = crate::BitReader;
11#[doc = "Field `ldo18io_bypass` writer - "]
12pub type LDO18IO_BYPASS_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `ten_ldo18io` reader - "]
14pub type TEN_LDO18IO_R = crate::BitReader;
15#[doc = "Field `ten_ldo18io` writer - "]
16pub type TEN_LDO18IO_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ldo18io_ocp_out` reader - "]
18pub type LDO18IO_OCP_OUT_R = crate::BitReader;
19#[doc = "Field `ldo18io_ocp_out` writer - "]
20pub type LDO18IO_OCP_OUT_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `ldo18io_bm` reader - "]
22pub type LDO18IO_BM_R = crate::FieldReader;
23#[doc = "Field `ldo18io_bm` writer - "]
24pub type LDO18IO_BM_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
25#[doc = "Field `ldo18io_cc` reader - "]
26pub type LDO18IO_CC_R = crate::FieldReader;
27#[doc = "Field `ldo18io_cc` writer - "]
28pub type LDO18IO_CC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
29#[doc = "Field `ldo18io_ocp_th` reader - "]
30pub type LDO18IO_OCP_TH_R = crate::FieldReader;
31#[doc = "Field `ldo18io_ocp_th` writer - "]
32pub type LDO18IO_OCP_TH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
33#[doc = "Field `ldo18io_ocp_en` reader - "]
34pub type LDO18IO_OCP_EN_R = crate::BitReader;
35#[doc = "Field `ldo18io_ocp_en` writer - "]
36pub type LDO18IO_OCP_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `ldo18io_pulldown` reader - "]
38pub type LDO18IO_PULLDOWN_R = crate::BitReader;
39#[doc = "Field `ldo18io_pulldown` writer - "]
40pub type LDO18IO_PULLDOWN_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `ldo18io_pulldown_sel` reader - "]
42pub type LDO18IO_PULLDOWN_SEL_R = crate::BitReader;
43#[doc = "Field `ldo18io_pulldown_sel` writer - "]
44pub type LDO18IO_PULLDOWN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `ldo18io_sstart_delay` reader - "]
46pub type LDO18IO_SSTART_DELAY_R = crate::FieldReader;
47#[doc = "Field `ldo18io_sstart_delay` writer - "]
48pub type LDO18IO_SSTART_DELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
49#[doc = "Field `ldo18io_sstart_en` reader - "]
50pub type LDO18IO_SSTART_EN_R = crate::BitReader;
51#[doc = "Field `ldo18io_sstart_en` writer - "]
52pub type LDO18IO_SSTART_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `ldo18io_vout_sel` reader - "]
54pub type LDO18IO_VOUT_SEL_R = crate::FieldReader;
55#[doc = "Field `ldo18io_vout_sel` writer - "]
56pub type LDO18IO_VOUT_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
57#[doc = "Field `ldo18io_vout_trim` reader - "]
58pub type LDO18IO_VOUT_TRIM_R = crate::FieldReader;
59#[doc = "Field `ldo18io_vout_trim` writer - "]
60pub type LDO18IO_VOUT_TRIM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
61impl R {
62 #[doc = "Bit 0"]
63 #[inline(always)]
64 pub fn pu_ldo18io(&self) -> PU_LDO18IO_R {
65 PU_LDO18IO_R::new((self.bits & 1) != 0)
66 }
67 #[doc = "Bit 1"]
68 #[inline(always)]
69 pub fn ldo18io_bypass(&self) -> LDO18IO_BYPASS_R {
70 LDO18IO_BYPASS_R::new(((self.bits >> 1) & 1) != 0)
71 }
72 #[doc = "Bit 2"]
73 #[inline(always)]
74 pub fn ten_ldo18io(&self) -> TEN_LDO18IO_R {
75 TEN_LDO18IO_R::new(((self.bits >> 2) & 1) != 0)
76 }
77 #[doc = "Bit 3"]
78 #[inline(always)]
79 pub fn ldo18io_ocp_out(&self) -> LDO18IO_OCP_OUT_R {
80 LDO18IO_OCP_OUT_R::new(((self.bits >> 3) & 1) != 0)
81 }
82 #[doc = "Bits 4:6"]
83 #[inline(always)]
84 pub fn ldo18io_bm(&self) -> LDO18IO_BM_R {
85 LDO18IO_BM_R::new(((self.bits >> 4) & 7) as u8)
86 }
87 #[doc = "Bits 8:10"]
88 #[inline(always)]
89 pub fn ldo18io_cc(&self) -> LDO18IO_CC_R {
90 LDO18IO_CC_R::new(((self.bits >> 8) & 7) as u8)
91 }
92 #[doc = "Bits 12:14"]
93 #[inline(always)]
94 pub fn ldo18io_ocp_th(&self) -> LDO18IO_OCP_TH_R {
95 LDO18IO_OCP_TH_R::new(((self.bits >> 12) & 7) as u8)
96 }
97 #[doc = "Bit 15"]
98 #[inline(always)]
99 pub fn ldo18io_ocp_en(&self) -> LDO18IO_OCP_EN_R {
100 LDO18IO_OCP_EN_R::new(((self.bits >> 15) & 1) != 0)
101 }
102 #[doc = "Bit 16"]
103 #[inline(always)]
104 pub fn ldo18io_pulldown(&self) -> LDO18IO_PULLDOWN_R {
105 LDO18IO_PULLDOWN_R::new(((self.bits >> 16) & 1) != 0)
106 }
107 #[doc = "Bit 17"]
108 #[inline(always)]
109 pub fn ldo18io_pulldown_sel(&self) -> LDO18IO_PULLDOWN_SEL_R {
110 LDO18IO_PULLDOWN_SEL_R::new(((self.bits >> 17) & 1) != 0)
111 }
112 #[doc = "Bits 20:22"]
113 #[inline(always)]
114 pub fn ldo18io_sstart_delay(&self) -> LDO18IO_SSTART_DELAY_R {
115 LDO18IO_SSTART_DELAY_R::new(((self.bits >> 20) & 7) as u8)
116 }
117 #[doc = "Bit 23"]
118 #[inline(always)]
119 pub fn ldo18io_sstart_en(&self) -> LDO18IO_SSTART_EN_R {
120 LDO18IO_SSTART_EN_R::new(((self.bits >> 23) & 1) != 0)
121 }
122 #[doc = "Bits 24:27"]
123 #[inline(always)]
124 pub fn ldo18io_vout_sel(&self) -> LDO18IO_VOUT_SEL_R {
125 LDO18IO_VOUT_SEL_R::new(((self.bits >> 24) & 0x0f) as u8)
126 }
127 #[doc = "Bits 28:31"]
128 #[inline(always)]
129 pub fn ldo18io_vout_trim(&self) -> LDO18IO_VOUT_TRIM_R {
130 LDO18IO_VOUT_TRIM_R::new(((self.bits >> 28) & 0x0f) as u8)
131 }
132}
133impl W {
134 #[doc = "Bit 0"]
135 #[inline(always)]
136 #[must_use]
137 pub fn pu_ldo18io(&mut self) -> PU_LDO18IO_W<LDO18_SPEC> {
138 PU_LDO18IO_W::new(self, 0)
139 }
140 #[doc = "Bit 1"]
141 #[inline(always)]
142 #[must_use]
143 pub fn ldo18io_bypass(&mut self) -> LDO18IO_BYPASS_W<LDO18_SPEC> {
144 LDO18IO_BYPASS_W::new(self, 1)
145 }
146 #[doc = "Bit 2"]
147 #[inline(always)]
148 #[must_use]
149 pub fn ten_ldo18io(&mut self) -> TEN_LDO18IO_W<LDO18_SPEC> {
150 TEN_LDO18IO_W::new(self, 2)
151 }
152 #[doc = "Bit 3"]
153 #[inline(always)]
154 #[must_use]
155 pub fn ldo18io_ocp_out(&mut self) -> LDO18IO_OCP_OUT_W<LDO18_SPEC> {
156 LDO18IO_OCP_OUT_W::new(self, 3)
157 }
158 #[doc = "Bits 4:6"]
159 #[inline(always)]
160 #[must_use]
161 pub fn ldo18io_bm(&mut self) -> LDO18IO_BM_W<LDO18_SPEC> {
162 LDO18IO_BM_W::new(self, 4)
163 }
164 #[doc = "Bits 8:10"]
165 #[inline(always)]
166 #[must_use]
167 pub fn ldo18io_cc(&mut self) -> LDO18IO_CC_W<LDO18_SPEC> {
168 LDO18IO_CC_W::new(self, 8)
169 }
170 #[doc = "Bits 12:14"]
171 #[inline(always)]
172 #[must_use]
173 pub fn ldo18io_ocp_th(&mut self) -> LDO18IO_OCP_TH_W<LDO18_SPEC> {
174 LDO18IO_OCP_TH_W::new(self, 12)
175 }
176 #[doc = "Bit 15"]
177 #[inline(always)]
178 #[must_use]
179 pub fn ldo18io_ocp_en(&mut self) -> LDO18IO_OCP_EN_W<LDO18_SPEC> {
180 LDO18IO_OCP_EN_W::new(self, 15)
181 }
182 #[doc = "Bit 16"]
183 #[inline(always)]
184 #[must_use]
185 pub fn ldo18io_pulldown(&mut self) -> LDO18IO_PULLDOWN_W<LDO18_SPEC> {
186 LDO18IO_PULLDOWN_W::new(self, 16)
187 }
188 #[doc = "Bit 17"]
189 #[inline(always)]
190 #[must_use]
191 pub fn ldo18io_pulldown_sel(&mut self) -> LDO18IO_PULLDOWN_SEL_W<LDO18_SPEC> {
192 LDO18IO_PULLDOWN_SEL_W::new(self, 17)
193 }
194 #[doc = "Bits 20:22"]
195 #[inline(always)]
196 #[must_use]
197 pub fn ldo18io_sstart_delay(&mut self) -> LDO18IO_SSTART_DELAY_W<LDO18_SPEC> {
198 LDO18IO_SSTART_DELAY_W::new(self, 20)
199 }
200 #[doc = "Bit 23"]
201 #[inline(always)]
202 #[must_use]
203 pub fn ldo18io_sstart_en(&mut self) -> LDO18IO_SSTART_EN_W<LDO18_SPEC> {
204 LDO18IO_SSTART_EN_W::new(self, 23)
205 }
206 #[doc = "Bits 24:27"]
207 #[inline(always)]
208 #[must_use]
209 pub fn ldo18io_vout_sel(&mut self) -> LDO18IO_VOUT_SEL_W<LDO18_SPEC> {
210 LDO18IO_VOUT_SEL_W::new(self, 24)
211 }
212 #[doc = "Bits 28:31"]
213 #[inline(always)]
214 #[must_use]
215 pub fn ldo18io_vout_trim(&mut self) -> LDO18IO_VOUT_TRIM_W<LDO18_SPEC> {
216 LDO18IO_VOUT_TRIM_W::new(self, 28)
217 }
218 #[doc = r" Writes raw bits to the register."]
219 #[doc = r""]
220 #[doc = r" # Safety"]
221 #[doc = r""]
222 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
223 #[inline(always)]
224 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
225 self.bits = bits;
226 self
227 }
228}
229#[doc = "1.8-V Low Dropout Linear Regulator configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldo18::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldo18::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
230pub struct LDO18_SPEC;
231impl crate::RegisterSpec for LDO18_SPEC {
232 type Ux = u32;
233}
234#[doc = "`read()` method returns [`ldo18::R`](R) reader structure"]
235impl crate::Readable for LDO18_SPEC {}
236#[doc = "`write(|w| ..)` method takes [`ldo18::W`](W) writer structure"]
237impl crate::Writable for LDO18_SPEC {
238 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
239 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
240}
241#[doc = "`reset()` method sets ldo18 to value 0"]
242impl crate::Resettable for LDO18_SPEC {
243 const RESET_VALUE: Self::Ux = 0;
244}