bl61x_pac/glb/
bmx_cfg3.rs1#[doc = "Register `bmx_cfg3` reader"]
2pub type R = crate::R<BMX_CFG3_SPEC>;
3#[doc = "Register `bmx_cfg3` writer"]
4pub type W = crate::W<BMX_CFG3_SPEC>;
5#[doc = "Field `reg_bmx_berr_clr` reader - "]
6pub type REG_BMX_BERR_CLR_R = crate::BitReader;
7#[doc = "Field `reg_bmx_berr_clr` writer - "]
8pub type REG_BMX_BERR_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `reg_bmx_berr_last` reader - "]
10pub type REG_BMX_BERR_LAST_R = crate::BitReader;
11#[doc = "Field `reg_bmx_berr_last` writer - "]
12pub type REG_BMX_BERR_LAST_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `reg_mcu_berr_clr` reader - "]
14pub type REG_MCU_BERR_CLR_R = crate::BitReader;
15#[doc = "Field `reg_mcu_berr_clr` writer - "]
16pub type REG_MCU_BERR_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `reg_mcu_berr_last` reader - "]
18pub type REG_MCU_BERR_LAST_R = crate::BitReader;
19#[doc = "Field `reg_mcu_berr_last` writer - "]
20pub type REG_MCU_BERR_LAST_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `sts_bmx_berr` reader - "]
22pub type STS_BMX_BERR_R = crate::BitReader;
23#[doc = "Field `sts_bmx_berr` writer - "]
24pub type STS_BMX_BERR_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `sts_mcu_berr` reader - "]
26pub type STS_MCU_BERR_R = crate::BitReader;
27#[doc = "Field `sts_mcu_berr` writer - "]
28pub type STS_MCU_BERR_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `sts_bmx_berr_write` reader - "]
30pub type STS_BMX_BERR_WRITE_R = crate::BitReader;
31#[doc = "Field `sts_bmx_berr_write` writer - "]
32pub type STS_BMX_BERR_WRITE_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `sts_mcu_berr_write` reader - "]
34pub type STS_MCU_BERR_WRITE_R = crate::BitReader;
35#[doc = "Field `sts_mcu_berr_write` writer - "]
36pub type STS_MCU_BERR_WRITE_W<'a, REG> = crate::BitWriter<'a, REG>;
37impl R {
38 #[doc = "Bit 0"]
39 #[inline(always)]
40 pub fn reg_bmx_berr_clr(&self) -> REG_BMX_BERR_CLR_R {
41 REG_BMX_BERR_CLR_R::new((self.bits & 1) != 0)
42 }
43 #[doc = "Bit 1"]
44 #[inline(always)]
45 pub fn reg_bmx_berr_last(&self) -> REG_BMX_BERR_LAST_R {
46 REG_BMX_BERR_LAST_R::new(((self.bits >> 1) & 1) != 0)
47 }
48 #[doc = "Bit 8"]
49 #[inline(always)]
50 pub fn reg_mcu_berr_clr(&self) -> REG_MCU_BERR_CLR_R {
51 REG_MCU_BERR_CLR_R::new(((self.bits >> 8) & 1) != 0)
52 }
53 #[doc = "Bit 9"]
54 #[inline(always)]
55 pub fn reg_mcu_berr_last(&self) -> REG_MCU_BERR_LAST_R {
56 REG_MCU_BERR_LAST_R::new(((self.bits >> 9) & 1) != 0)
57 }
58 #[doc = "Bit 16"]
59 #[inline(always)]
60 pub fn sts_bmx_berr(&self) -> STS_BMX_BERR_R {
61 STS_BMX_BERR_R::new(((self.bits >> 16) & 1) != 0)
62 }
63 #[doc = "Bit 17"]
64 #[inline(always)]
65 pub fn sts_mcu_berr(&self) -> STS_MCU_BERR_R {
66 STS_MCU_BERR_R::new(((self.bits >> 17) & 1) != 0)
67 }
68 #[doc = "Bit 24"]
69 #[inline(always)]
70 pub fn sts_bmx_berr_write(&self) -> STS_BMX_BERR_WRITE_R {
71 STS_BMX_BERR_WRITE_R::new(((self.bits >> 24) & 1) != 0)
72 }
73 #[doc = "Bit 25"]
74 #[inline(always)]
75 pub fn sts_mcu_berr_write(&self) -> STS_MCU_BERR_WRITE_R {
76 STS_MCU_BERR_WRITE_R::new(((self.bits >> 25) & 1) != 0)
77 }
78}
79impl W {
80 #[doc = "Bit 0"]
81 #[inline(always)]
82 #[must_use]
83 pub fn reg_bmx_berr_clr(&mut self) -> REG_BMX_BERR_CLR_W<BMX_CFG3_SPEC> {
84 REG_BMX_BERR_CLR_W::new(self, 0)
85 }
86 #[doc = "Bit 1"]
87 #[inline(always)]
88 #[must_use]
89 pub fn reg_bmx_berr_last(&mut self) -> REG_BMX_BERR_LAST_W<BMX_CFG3_SPEC> {
90 REG_BMX_BERR_LAST_W::new(self, 1)
91 }
92 #[doc = "Bit 8"]
93 #[inline(always)]
94 #[must_use]
95 pub fn reg_mcu_berr_clr(&mut self) -> REG_MCU_BERR_CLR_W<BMX_CFG3_SPEC> {
96 REG_MCU_BERR_CLR_W::new(self, 8)
97 }
98 #[doc = "Bit 9"]
99 #[inline(always)]
100 #[must_use]
101 pub fn reg_mcu_berr_last(&mut self) -> REG_MCU_BERR_LAST_W<BMX_CFG3_SPEC> {
102 REG_MCU_BERR_LAST_W::new(self, 9)
103 }
104 #[doc = "Bit 16"]
105 #[inline(always)]
106 #[must_use]
107 pub fn sts_bmx_berr(&mut self) -> STS_BMX_BERR_W<BMX_CFG3_SPEC> {
108 STS_BMX_BERR_W::new(self, 16)
109 }
110 #[doc = "Bit 17"]
111 #[inline(always)]
112 #[must_use]
113 pub fn sts_mcu_berr(&mut self) -> STS_MCU_BERR_W<BMX_CFG3_SPEC> {
114 STS_MCU_BERR_W::new(self, 17)
115 }
116 #[doc = "Bit 24"]
117 #[inline(always)]
118 #[must_use]
119 pub fn sts_bmx_berr_write(&mut self) -> STS_BMX_BERR_WRITE_W<BMX_CFG3_SPEC> {
120 STS_BMX_BERR_WRITE_W::new(self, 24)
121 }
122 #[doc = "Bit 25"]
123 #[inline(always)]
124 #[must_use]
125 pub fn sts_mcu_berr_write(&mut self) -> STS_MCU_BERR_WRITE_W<BMX_CFG3_SPEC> {
126 STS_MCU_BERR_WRITE_W::new(self, 25)
127 }
128 #[doc = r" Writes raw bits to the register."]
129 #[doc = r""]
130 #[doc = r" # Safety"]
131 #[doc = r""]
132 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
133 #[inline(always)]
134 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
135 self.bits = bits;
136 self
137 }
138}
139#[doc = "bmx_cfg3.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bmx_cfg3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bmx_cfg3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
140pub struct BMX_CFG3_SPEC;
141impl crate::RegisterSpec for BMX_CFG3_SPEC {
142 type Ux = u32;
143}
144#[doc = "`read()` method returns [`bmx_cfg3::R`](R) reader structure"]
145impl crate::Readable for BMX_CFG3_SPEC {}
146#[doc = "`write(|w| ..)` method takes [`bmx_cfg3::W`](W) writer structure"]
147impl crate::Writable for BMX_CFG3_SPEC {
148 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
149 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
150}
151#[doc = "`reset()` method sets bmx_cfg3 to value 0"]
152impl crate::Resettable for BMX_CFG3_SPEC {
153 const RESET_VALUE: Self::Ux = 0;
154}