bl61x_pac/aon/
gpadc_reg_isr.rs

1#[doc = "Register `gpadc_reg_isr` reader"]
2pub type R = crate::R<GPADC_REG_ISR_SPEC>;
3#[doc = "Register `gpadc_reg_isr` writer"]
4pub type W = crate::W<GPADC_REG_ISR_SPEC>;
5#[doc = "Field `gpadc_neg_satur` reader - "]
6pub type GPADC_NEG_SATUR_R = crate::BitReader;
7#[doc = "Field `gpadc_neg_satur` writer - "]
8pub type GPADC_NEG_SATUR_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `gpadc_pos_satur` reader - "]
10pub type GPADC_POS_SATUR_R = crate::BitReader;
11#[doc = "Field `gpadc_pos_satur` writer - "]
12pub type GPADC_POS_SATUR_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `gpadc_neg_satur_clr` reader - "]
14pub type GPADC_NEG_SATUR_CLR_R = crate::BitReader;
15#[doc = "Field `gpadc_neg_satur_clr` writer - "]
16pub type GPADC_NEG_SATUR_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `gpadc_pos_satur_clr` reader - "]
18pub type GPADC_POS_SATUR_CLR_R = crate::BitReader;
19#[doc = "Field `gpadc_pos_satur_clr` writer - "]
20pub type GPADC_POS_SATUR_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `gpadc_neg_satur_mask` reader - "]
22pub type GPADC_NEG_SATUR_MASK_R = crate::BitReader;
23#[doc = "Field `gpadc_neg_satur_mask` writer - "]
24pub type GPADC_NEG_SATUR_MASK_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `gpadc_pos_satur_mask` reader - "]
26pub type GPADC_POS_SATUR_MASK_R = crate::BitReader;
27#[doc = "Field `gpadc_pos_satur_mask` writer - "]
28pub type GPADC_POS_SATUR_MASK_W<'a, REG> = crate::BitWriter<'a, REG>;
29impl R {
30    #[doc = "Bit 0"]
31    #[inline(always)]
32    pub fn gpadc_neg_satur(&self) -> GPADC_NEG_SATUR_R {
33        GPADC_NEG_SATUR_R::new((self.bits & 1) != 0)
34    }
35    #[doc = "Bit 1"]
36    #[inline(always)]
37    pub fn gpadc_pos_satur(&self) -> GPADC_POS_SATUR_R {
38        GPADC_POS_SATUR_R::new(((self.bits >> 1) & 1) != 0)
39    }
40    #[doc = "Bit 4"]
41    #[inline(always)]
42    pub fn gpadc_neg_satur_clr(&self) -> GPADC_NEG_SATUR_CLR_R {
43        GPADC_NEG_SATUR_CLR_R::new(((self.bits >> 4) & 1) != 0)
44    }
45    #[doc = "Bit 5"]
46    #[inline(always)]
47    pub fn gpadc_pos_satur_clr(&self) -> GPADC_POS_SATUR_CLR_R {
48        GPADC_POS_SATUR_CLR_R::new(((self.bits >> 5) & 1) != 0)
49    }
50    #[doc = "Bit 8"]
51    #[inline(always)]
52    pub fn gpadc_neg_satur_mask(&self) -> GPADC_NEG_SATUR_MASK_R {
53        GPADC_NEG_SATUR_MASK_R::new(((self.bits >> 8) & 1) != 0)
54    }
55    #[doc = "Bit 9"]
56    #[inline(always)]
57    pub fn gpadc_pos_satur_mask(&self) -> GPADC_POS_SATUR_MASK_R {
58        GPADC_POS_SATUR_MASK_R::new(((self.bits >> 9) & 1) != 0)
59    }
60}
61impl W {
62    #[doc = "Bit 0"]
63    #[inline(always)]
64    #[must_use]
65    pub fn gpadc_neg_satur(&mut self) -> GPADC_NEG_SATUR_W<GPADC_REG_ISR_SPEC> {
66        GPADC_NEG_SATUR_W::new(self, 0)
67    }
68    #[doc = "Bit 1"]
69    #[inline(always)]
70    #[must_use]
71    pub fn gpadc_pos_satur(&mut self) -> GPADC_POS_SATUR_W<GPADC_REG_ISR_SPEC> {
72        GPADC_POS_SATUR_W::new(self, 1)
73    }
74    #[doc = "Bit 4"]
75    #[inline(always)]
76    #[must_use]
77    pub fn gpadc_neg_satur_clr(&mut self) -> GPADC_NEG_SATUR_CLR_W<GPADC_REG_ISR_SPEC> {
78        GPADC_NEG_SATUR_CLR_W::new(self, 4)
79    }
80    #[doc = "Bit 5"]
81    #[inline(always)]
82    #[must_use]
83    pub fn gpadc_pos_satur_clr(&mut self) -> GPADC_POS_SATUR_CLR_W<GPADC_REG_ISR_SPEC> {
84        GPADC_POS_SATUR_CLR_W::new(self, 5)
85    }
86    #[doc = "Bit 8"]
87    #[inline(always)]
88    #[must_use]
89    pub fn gpadc_neg_satur_mask(&mut self) -> GPADC_NEG_SATUR_MASK_W<GPADC_REG_ISR_SPEC> {
90        GPADC_NEG_SATUR_MASK_W::new(self, 8)
91    }
92    #[doc = "Bit 9"]
93    #[inline(always)]
94    #[must_use]
95    pub fn gpadc_pos_satur_mask(&mut self) -> GPADC_POS_SATUR_MASK_W<GPADC_REG_ISR_SPEC> {
96        GPADC_POS_SATUR_MASK_W::new(self, 9)
97    }
98    #[doc = r" Writes raw bits to the register."]
99    #[doc = r""]
100    #[doc = r" # Safety"]
101    #[doc = r""]
102    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
103    #[inline(always)]
104    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
105        self.bits = bits;
106        self
107    }
108}
109#[doc = "gpadc_reg_isr.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpadc_reg_isr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpadc_reg_isr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
110pub struct GPADC_REG_ISR_SPEC;
111impl crate::RegisterSpec for GPADC_REG_ISR_SPEC {
112    type Ux = u32;
113}
114#[doc = "`read()` method returns [`gpadc_reg_isr::R`](R) reader structure"]
115impl crate::Readable for GPADC_REG_ISR_SPEC {}
116#[doc = "`write(|w| ..)` method takes [`gpadc_reg_isr::W`](W) writer structure"]
117impl crate::Writable for GPADC_REG_ISR_SPEC {
118    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
119    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120}
121#[doc = "`reset()` method sets gpadc_reg_isr to value 0"]
122impl crate::Resettable for GPADC_REG_ISR_SPEC {
123    const RESET_VALUE: Self::Ux = 0;
124}
bl61x_pac/aon/gpadc_reg_isr.rs

bl61x_pac/aon/
gpadc_reg_isr.rs
