bl61x_pac/aon/
gpadc_reg_config1.rs

1#[doc = "Register `gpadc_reg_config1` reader"]
2pub type R = crate::R<GPADC_REG_CONFIG1_SPEC>;
3#[doc = "Register `gpadc_reg_config1` writer"]
4pub type W = crate::W<GPADC_REG_CONFIG1_SPEC>;
5#[doc = "Field `gpadc_cal_os_en` reader - "]
6pub type GPADC_CAL_OS_EN_R = crate::BitReader;
7#[doc = "Field `gpadc_cal_os_en` writer - "]
8pub type GPADC_CAL_OS_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `gpadc_cont_conv_en` reader - "]
10pub type GPADC_CONT_CONV_EN_R = crate::BitReader;
11#[doc = "Field `gpadc_cont_conv_en` writer - "]
12pub type GPADC_CONT_CONV_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `gpadc_res_sel` reader - "]
14pub type GPADC_RES_SEL_R = crate::FieldReader;
15#[doc = "Field `gpadc_res_sel` writer - "]
16pub type GPADC_RES_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
17#[doc = "Field `gpadc_vcm_sel_en` reader - "]
18pub type GPADC_VCM_SEL_EN_R = crate::BitReader;
19#[doc = "Field `gpadc_vcm_sel_en` writer - "]
20pub type GPADC_VCM_SEL_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `gpadc_vcm_hyst_sel` reader - "]
22pub type GPADC_VCM_HYST_SEL_R = crate::BitReader;
23#[doc = "Field `gpadc_vcm_hyst_sel` writer - "]
24pub type GPADC_VCM_HYST_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `gpadc_lowv_det_en` reader - "]
26pub type GPADC_LOWV_DET_EN_R = crate::BitReader;
27#[doc = "Field `gpadc_lowv_det_en` writer - "]
28pub type GPADC_LOWV_DET_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `gpadc_pwm_trg_en` reader - "]
30pub type GPADC_PWM_TRG_EN_R = crate::BitReader;
31#[doc = "Field `gpadc_pwm_trg_en` writer - "]
32pub type GPADC_PWM_TRG_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `gpadc_clk_ana_dly` reader - "]
34pub type GPADC_CLK_ANA_DLY_R = crate::FieldReader;
35#[doc = "Field `gpadc_clk_ana_dly` writer - "]
36pub type GPADC_CLK_ANA_DLY_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
37#[doc = "Field `gpadc_clk_ana_dly_en` reader - "]
38pub type GPADC_CLK_ANA_DLY_EN_R = crate::BitReader;
39#[doc = "Field `gpadc_clk_ana_dly_en` writer - "]
40pub type GPADC_CLK_ANA_DLY_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `gpadc_clk_ana_inv` reader - "]
42pub type GPADC_CLK_ANA_INV_R = crate::BitReader;
43#[doc = "Field `gpadc_clk_ana_inv` writer - "]
44pub type GPADC_CLK_ANA_INV_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `gpadc_clk_div_ratio` reader - "]
46pub type GPADC_CLK_DIV_RATIO_R = crate::FieldReader;
47#[doc = "Field `gpadc_clk_div_ratio` writer - "]
48pub type GPADC_CLK_DIV_RATIO_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
49#[doc = "Field `gpadc_scan_length` reader - "]
50pub type GPADC_SCAN_LENGTH_R = crate::FieldReader;
51#[doc = "Field `gpadc_scan_length` writer - "]
52pub type GPADC_SCAN_LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
53#[doc = "Field `gpadc_scan_en` reader - "]
54pub type GPADC_SCAN_EN_R = crate::BitReader;
55#[doc = "Field `gpadc_scan_en` writer - "]
56pub type GPADC_SCAN_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `gpadc_dither_en` reader - "]
58pub type GPADC_DITHER_EN_R = crate::BitReader;
59#[doc = "Field `gpadc_dither_en` writer - "]
60pub type GPADC_DITHER_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `gpadc_v11_sel` reader - "]
62pub type GPADC_V11_SEL_R = crate::FieldReader;
63#[doc = "Field `gpadc_v11_sel` writer - "]
64pub type GPADC_V11_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
65#[doc = "Field `gpadc_v18_sel` reader - "]
66pub type GPADC_V18_SEL_R = crate::FieldReader;
67#[doc = "Field `gpadc_v18_sel` writer - "]
68pub type GPADC_V18_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
69impl R {
70    #[doc = "Bit 0"]
71    #[inline(always)]
72    pub fn gpadc_cal_os_en(&self) -> GPADC_CAL_OS_EN_R {
73        GPADC_CAL_OS_EN_R::new((self.bits & 1) != 0)
74    }
75    #[doc = "Bit 1"]
76    #[inline(always)]
77    pub fn gpadc_cont_conv_en(&self) -> GPADC_CONT_CONV_EN_R {
78        GPADC_CONT_CONV_EN_R::new(((self.bits >> 1) & 1) != 0)
79    }
80    #[doc = "Bits 2:4"]
81    #[inline(always)]
82    pub fn gpadc_res_sel(&self) -> GPADC_RES_SEL_R {
83        GPADC_RES_SEL_R::new(((self.bits >> 2) & 7) as u8)
84    }
85    #[doc = "Bit 8"]
86    #[inline(always)]
87    pub fn gpadc_vcm_sel_en(&self) -> GPADC_VCM_SEL_EN_R {
88        GPADC_VCM_SEL_EN_R::new(((self.bits >> 8) & 1) != 0)
89    }
90    #[doc = "Bit 9"]
91    #[inline(always)]
92    pub fn gpadc_vcm_hyst_sel(&self) -> GPADC_VCM_HYST_SEL_R {
93        GPADC_VCM_HYST_SEL_R::new(((self.bits >> 9) & 1) != 0)
94    }
95    #[doc = "Bit 10"]
96    #[inline(always)]
97    pub fn gpadc_lowv_det_en(&self) -> GPADC_LOWV_DET_EN_R {
98        GPADC_LOWV_DET_EN_R::new(((self.bits >> 10) & 1) != 0)
99    }
100    #[doc = "Bit 11"]
101    #[inline(always)]
102    pub fn gpadc_pwm_trg_en(&self) -> GPADC_PWM_TRG_EN_R {
103        GPADC_PWM_TRG_EN_R::new(((self.bits >> 11) & 1) != 0)
104    }
105    #[doc = "Bits 12:15"]
106    #[inline(always)]
107    pub fn gpadc_clk_ana_dly(&self) -> GPADC_CLK_ANA_DLY_R {
108        GPADC_CLK_ANA_DLY_R::new(((self.bits >> 12) & 0x0f) as u8)
109    }
110    #[doc = "Bit 16"]
111    #[inline(always)]
112    pub fn gpadc_clk_ana_dly_en(&self) -> GPADC_CLK_ANA_DLY_EN_R {
113        GPADC_CLK_ANA_DLY_EN_R::new(((self.bits >> 16) & 1) != 0)
114    }
115    #[doc = "Bit 17"]
116    #[inline(always)]
117    pub fn gpadc_clk_ana_inv(&self) -> GPADC_CLK_ANA_INV_R {
118        GPADC_CLK_ANA_INV_R::new(((self.bits >> 17) & 1) != 0)
119    }
120    #[doc = "Bits 18:20"]
121    #[inline(always)]
122    pub fn gpadc_clk_div_ratio(&self) -> GPADC_CLK_DIV_RATIO_R {
123        GPADC_CLK_DIV_RATIO_R::new(((self.bits >> 18) & 7) as u8)
124    }
125    #[doc = "Bits 21:24"]
126    #[inline(always)]
127    pub fn gpadc_scan_length(&self) -> GPADC_SCAN_LENGTH_R {
128        GPADC_SCAN_LENGTH_R::new(((self.bits >> 21) & 0x0f) as u8)
129    }
130    #[doc = "Bit 25"]
131    #[inline(always)]
132    pub fn gpadc_scan_en(&self) -> GPADC_SCAN_EN_R {
133        GPADC_SCAN_EN_R::new(((self.bits >> 25) & 1) != 0)
134    }
135    #[doc = "Bit 26"]
136    #[inline(always)]
137    pub fn gpadc_dither_en(&self) -> GPADC_DITHER_EN_R {
138        GPADC_DITHER_EN_R::new(((self.bits >> 26) & 1) != 0)
139    }
140    #[doc = "Bits 27:28"]
141    #[inline(always)]
142    pub fn gpadc_v11_sel(&self) -> GPADC_V11_SEL_R {
143        GPADC_V11_SEL_R::new(((self.bits >> 27) & 3) as u8)
144    }
145    #[doc = "Bits 29:30"]
146    #[inline(always)]
147    pub fn gpadc_v18_sel(&self) -> GPADC_V18_SEL_R {
148        GPADC_V18_SEL_R::new(((self.bits >> 29) & 3) as u8)
149    }
150}
151impl W {
152    #[doc = "Bit 0"]
153    #[inline(always)]
154    #[must_use]
155    pub fn gpadc_cal_os_en(&mut self) -> GPADC_CAL_OS_EN_W<GPADC_REG_CONFIG1_SPEC> {
156        GPADC_CAL_OS_EN_W::new(self, 0)
157    }
158    #[doc = "Bit 1"]
159    #[inline(always)]
160    #[must_use]
161    pub fn gpadc_cont_conv_en(&mut self) -> GPADC_CONT_CONV_EN_W<GPADC_REG_CONFIG1_SPEC> {
162        GPADC_CONT_CONV_EN_W::new(self, 1)
163    }
164    #[doc = "Bits 2:4"]
165    #[inline(always)]
166    #[must_use]
167    pub fn gpadc_res_sel(&mut self) -> GPADC_RES_SEL_W<GPADC_REG_CONFIG1_SPEC> {
168        GPADC_RES_SEL_W::new(self, 2)
169    }
170    #[doc = "Bit 8"]
171    #[inline(always)]
172    #[must_use]
173    pub fn gpadc_vcm_sel_en(&mut self) -> GPADC_VCM_SEL_EN_W<GPADC_REG_CONFIG1_SPEC> {
174        GPADC_VCM_SEL_EN_W::new(self, 8)
175    }
176    #[doc = "Bit 9"]
177    #[inline(always)]
178    #[must_use]
179    pub fn gpadc_vcm_hyst_sel(&mut self) -> GPADC_VCM_HYST_SEL_W<GPADC_REG_CONFIG1_SPEC> {
180        GPADC_VCM_HYST_SEL_W::new(self, 9)
181    }
182    #[doc = "Bit 10"]
183    #[inline(always)]
184    #[must_use]
185    pub fn gpadc_lowv_det_en(&mut self) -> GPADC_LOWV_DET_EN_W<GPADC_REG_CONFIG1_SPEC> {
186        GPADC_LOWV_DET_EN_W::new(self, 10)
187    }
188    #[doc = "Bit 11"]
189    #[inline(always)]
190    #[must_use]
191    pub fn gpadc_pwm_trg_en(&mut self) -> GPADC_PWM_TRG_EN_W<GPADC_REG_CONFIG1_SPEC> {
192        GPADC_PWM_TRG_EN_W::new(self, 11)
193    }
194    #[doc = "Bits 12:15"]
195    #[inline(always)]
196    #[must_use]
197    pub fn gpadc_clk_ana_dly(&mut self) -> GPADC_CLK_ANA_DLY_W<GPADC_REG_CONFIG1_SPEC> {
198        GPADC_CLK_ANA_DLY_W::new(self, 12)
199    }
200    #[doc = "Bit 16"]
201    #[inline(always)]
202    #[must_use]
203    pub fn gpadc_clk_ana_dly_en(&mut self) -> GPADC_CLK_ANA_DLY_EN_W<GPADC_REG_CONFIG1_SPEC> {
204        GPADC_CLK_ANA_DLY_EN_W::new(self, 16)
205    }
206    #[doc = "Bit 17"]
207    #[inline(always)]
208    #[must_use]
209    pub fn gpadc_clk_ana_inv(&mut self) -> GPADC_CLK_ANA_INV_W<GPADC_REG_CONFIG1_SPEC> {
210        GPADC_CLK_ANA_INV_W::new(self, 17)
211    }
212    #[doc = "Bits 18:20"]
213    #[inline(always)]
214    #[must_use]
215    pub fn gpadc_clk_div_ratio(&mut self) -> GPADC_CLK_DIV_RATIO_W<GPADC_REG_CONFIG1_SPEC> {
216        GPADC_CLK_DIV_RATIO_W::new(self, 18)
217    }
218    #[doc = "Bits 21:24"]
219    #[inline(always)]
220    #[must_use]
221    pub fn gpadc_scan_length(&mut self) -> GPADC_SCAN_LENGTH_W<GPADC_REG_CONFIG1_SPEC> {
222        GPADC_SCAN_LENGTH_W::new(self, 21)
223    }
224    #[doc = "Bit 25"]
225    #[inline(always)]
226    #[must_use]
227    pub fn gpadc_scan_en(&mut self) -> GPADC_SCAN_EN_W<GPADC_REG_CONFIG1_SPEC> {
228        GPADC_SCAN_EN_W::new(self, 25)
229    }
230    #[doc = "Bit 26"]
231    #[inline(always)]
232    #[must_use]
233    pub fn gpadc_dither_en(&mut self) -> GPADC_DITHER_EN_W<GPADC_REG_CONFIG1_SPEC> {
234        GPADC_DITHER_EN_W::new(self, 26)
235    }
236    #[doc = "Bits 27:28"]
237    #[inline(always)]
238    #[must_use]
239    pub fn gpadc_v11_sel(&mut self) -> GPADC_V11_SEL_W<GPADC_REG_CONFIG1_SPEC> {
240        GPADC_V11_SEL_W::new(self, 27)
241    }
242    #[doc = "Bits 29:30"]
243    #[inline(always)]
244    #[must_use]
245    pub fn gpadc_v18_sel(&mut self) -> GPADC_V18_SEL_W<GPADC_REG_CONFIG1_SPEC> {
246        GPADC_V18_SEL_W::new(self, 29)
247    }
248    #[doc = r" Writes raw bits to the register."]
249    #[doc = r""]
250    #[doc = r" # Safety"]
251    #[doc = r""]
252    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
253    #[inline(always)]
254    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
255        self.bits = bits;
256        self
257    }
258}
259#[doc = "gpadc_reg_config1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpadc_reg_config1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpadc_reg_config1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
260pub struct GPADC_REG_CONFIG1_SPEC;
261impl crate::RegisterSpec for GPADC_REG_CONFIG1_SPEC {
262    type Ux = u32;
263}
264#[doc = "`read()` method returns [`gpadc_reg_config1::R`](R) reader structure"]
265impl crate::Readable for GPADC_REG_CONFIG1_SPEC {}
266#[doc = "`write(|w| ..)` method takes [`gpadc_reg_config1::W`](W) writer structure"]
267impl crate::Writable for GPADC_REG_CONFIG1_SPEC {
268    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
269    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
270}
271#[doc = "`reset()` method sets gpadc_reg_config1 to value 0"]
272impl crate::Resettable for GPADC_REG_CONFIG1_SPEC {
273    const RESET_VALUE: Self::Ux = 0;
274}
bl61x_pac/aon/gpadc_reg_config1.rs

bl61x_pac/aon/
gpadc_reg_config1.rs
