bl616_pac/pwm/group/
interrupt_clear.rs

1#[doc = "Register `interrupt_clear` writer"]
2pub struct W(crate::W<INTERRUPT_CLEAR_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<INTERRUPT_CLEAR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<INTERRUPT_CLEAR_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<INTERRUPT_CLEAR_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Intenal counter for channel have exceeded low threshold\n\nValue on reset: 0"]
23#[derive(Clone, Copy, Debug, PartialEq, Eq)]
24pub enum INTERRUPT_CLEAR_AW {
25    #[doc = "1: Write 1 to clear interrupt state"]
26    CLEAR = 1,
27}
28impl From<INTERRUPT_CLEAR_AW> for bool {
29    #[inline(always)]
30    fn from(variant: INTERRUPT_CLEAR_AW) -> Self {
31        variant as u8 != 0
32    }
33}
34#[doc = "Field `threshold_low[0-3]` writer - Intenal counter for channel have exceeded low threshold"]
35pub type THRESHOLD_LOW_W<'a, const O: u8> =
36    crate::BitWriter<'a, u32, INTERRUPT_CLEAR_SPEC, INTERRUPT_CLEAR_AW, O>;
37impl<'a, const O: u8> THRESHOLD_LOW_W<'a, O> {
38    #[doc = "Write 1 to clear interrupt state"]
39    #[inline(always)]
40    pub fn clear(self) -> &'a mut W {
41        self.variant(INTERRUPT_CLEAR_AW::CLEAR)
42    }
43}
44#[doc = "Field `threshold_high[0-3]` writer - Intenal counter for channel have exceeded high threshold"]
45pub use THRESHOLD_LOW_W as THRESHOLD_HIGH_W;
46#[doc = "Field `interrupt_period` writer - Intenal counter for channel have exceeded interrupt cycle threshold"]
47pub use THRESHOLD_LOW_W as INTERRUPT_PERIOD_W;
48#[doc = "Field `external_break` writer - External break signal occurred"]
49pub use THRESHOLD_LOW_W as EXTERNAL_BREAK_W;
50#[doc = "Field `repeat` writer - Peripheral group have completed one repeat cycle"]
51pub use THRESHOLD_LOW_W as REPEAT_W;
52impl W {
53    #[doc = "Intenal counter for channel have exceeded low threshold"]
54    #[inline(always)]
55    #[must_use]
56    pub unsafe fn threshold_low<const O: u8>(&mut self) -> THRESHOLD_LOW_W<O> {
57        THRESHOLD_LOW_W::new(self)
58    }
59    #[doc = "Bit 0 - Intenal counter for channel have exceeded low threshold"]
60    #[inline(always)]
61    #[must_use]
62    pub fn threshold_low0(&mut self) -> THRESHOLD_LOW_W<0> {
63        THRESHOLD_LOW_W::new(self)
64    }
65    #[doc = "Bit 2 - Intenal counter for channel have exceeded low threshold"]
66    #[inline(always)]
67    #[must_use]
68    pub fn threshold_low1(&mut self) -> THRESHOLD_LOW_W<2> {
69        THRESHOLD_LOW_W::new(self)
70    }
71    #[doc = "Bit 4 - Intenal counter for channel have exceeded low threshold"]
72    #[inline(always)]
73    #[must_use]
74    pub fn threshold_low2(&mut self) -> THRESHOLD_LOW_W<4> {
75        THRESHOLD_LOW_W::new(self)
76    }
77    #[doc = "Bit 6 - Intenal counter for channel have exceeded low threshold"]
78    #[inline(always)]
79    #[must_use]
80    pub fn threshold_low3(&mut self) -> THRESHOLD_LOW_W<6> {
81        THRESHOLD_LOW_W::new(self)
82    }
83    #[doc = "Intenal counter for channel have exceeded high threshold"]
84    #[inline(always)]
85    #[must_use]
86    pub unsafe fn threshold_high<const O: u8>(&mut self) -> THRESHOLD_HIGH_W<O> {
87        THRESHOLD_HIGH_W::new(self)
88    }
89    #[doc = "Bit 1 - Intenal counter for channel have exceeded high threshold"]
90    #[inline(always)]
91    #[must_use]
92    pub fn threshold_high0(&mut self) -> THRESHOLD_HIGH_W<1> {
93        THRESHOLD_HIGH_W::new(self)
94    }
95    #[doc = "Bit 3 - Intenal counter for channel have exceeded high threshold"]
96    #[inline(always)]
97    #[must_use]
98    pub fn threshold_high1(&mut self) -> THRESHOLD_HIGH_W<3> {
99        THRESHOLD_HIGH_W::new(self)
100    }
101    #[doc = "Bit 5 - Intenal counter for channel have exceeded high threshold"]
102    #[inline(always)]
103    #[must_use]
104    pub fn threshold_high2(&mut self) -> THRESHOLD_HIGH_W<5> {
105        THRESHOLD_HIGH_W::new(self)
106    }
107    #[doc = "Bit 7 - Intenal counter for channel have exceeded high threshold"]
108    #[inline(always)]
109    #[must_use]
110    pub fn threshold_high3(&mut self) -> THRESHOLD_HIGH_W<7> {
111        THRESHOLD_HIGH_W::new(self)
112    }
113    #[doc = "Bit 8 - Intenal counter for channel have exceeded interrupt cycle threshold"]
114    #[inline(always)]
115    #[must_use]
116    pub fn interrupt_period(&mut self) -> INTERRUPT_PERIOD_W<8> {
117        INTERRUPT_PERIOD_W::new(self)
118    }
119    #[doc = "Bit 9 - External break signal occurred"]
120    #[inline(always)]
121    #[must_use]
122    pub fn external_break(&mut self) -> EXTERNAL_BREAK_W<9> {
123        EXTERNAL_BREAK_W::new(self)
124    }
125    #[doc = "Bit 10 - Peripheral group have completed one repeat cycle"]
126    #[inline(always)]
127    #[must_use]
128    pub fn repeat(&mut self) -> REPEAT_W<10> {
129        REPEAT_W::new(self)
130    }
131    #[doc = "Writes raw bits to the register."]
132    #[inline(always)]
133    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
134        self.0.bits(bits);
135        self
136    }
137}
138#[doc = "Clear interrupt register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_clear](index.html) module"]
139pub struct INTERRUPT_CLEAR_SPEC;
140impl crate::RegisterSpec for INTERRUPT_CLEAR_SPEC {
141    type Ux = u32;
142}
143#[doc = "`write(|w| ..)` method takes [interrupt_clear::W](W) writer structure"]
144impl crate::Writable for INTERRUPT_CLEAR_SPEC {
145    type Writer = W;
146    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
147    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
148}
149#[doc = "`reset()` method sets interrupt_clear to value 0"]
150impl crate::Resettable for INTERRUPT_CLEAR_SPEC {
151    const RESET_VALUE: Self::Ux = 0;
152}
bl616_pac/pwm/group/interrupt_clear.rs

bl616_pac/pwm/group/
interrupt_clear.rs
