bl616_pac/glb/
gpio_config.rs

1#[doc = "Register `gpio_config[%s]` reader"]
2pub struct R(crate::R<GPIO_CONFIG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<GPIO_CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<GPIO_CONFIG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<GPIO_CONFIG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `gpio_config[%s]` writer"]
17pub struct W(crate::W<GPIO_CONFIG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<GPIO_CONFIG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<GPIO_CONFIG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<GPIO_CONFIG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `input_function` reader - Enable input signal"]
38pub type INPUT_FUNCTION_R = crate::BitReader<bool>;
39#[doc = "Field `input_function` writer - Enable input signal"]
40pub type INPUT_FUNCTION_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
41#[doc = "Field `schmitt` reader - Enable schmitt trigger"]
42pub type SCHMITT_R = crate::BitReader<bool>;
43#[doc = "Field `schmitt` writer - Enable schmitt trigger"]
44pub type SCHMITT_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
45#[doc = "Field `drive` reader - Drive strength"]
46pub type DRIVE_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `drive` writer - Drive strength"]
48pub type DRIVE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, GPIO_CONFIG_SPEC, u8, u8, 2, O>;
49#[doc = "Field `pull_up` reader - Enable internal pull-up"]
50pub type PULL_UP_R = crate::BitReader<bool>;
51#[doc = "Field `pull_up` writer - Enable internal pull-up"]
52pub type PULL_UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
53#[doc = "Field `pull_down` reader - Enable internal pull-down"]
54pub type PULL_DOWN_R = crate::BitReader<bool>;
55#[doc = "Field `pull_down` writer - Enable internal pull-down"]
56pub type PULL_DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
57#[doc = "Field `output_function` reader - Enable output signal"]
58pub type OUTPUT_FUNCTION_R = crate::BitReader<bool>;
59#[doc = "Field `output_function` writer - Enable output signal"]
60pub type OUTPUT_FUNCTION_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
61#[doc = "Field `alternate` reader - Pin alternate function switch"]
62pub type ALTERNATE_R = crate::FieldReader<u8, ALTERNATE_A>;
63#[doc = "Pin alternate function switch\n\nValue on reset: 0"]
64#[derive(Clone, Copy, Debug, PartialEq, Eq)]
65#[repr(u8)]
66pub enum ALTERNATE_A {
67    #[doc = "0: Secure Digital host"]
68    SDH = 0,
69    #[doc = "1: Serial Peripheral Interface 0"]
70    SPI0 = 1,
71    #[doc = "2: Flash control"]
72    FLASH = 2,
73    #[doc = "3: Inter-IC Sound 0"]
74    I2S0 = 3,
75    #[doc = "4: Pulse Density Modulation"]
76    PDM = 4,
77    #[doc = "5: Inter-Integrated Circuit bus 0"]
78    I2C0 = 5,
79    #[doc = "6: Inter-Integrated Circuit bus 1"]
80    I2C1 = 6,
81    #[doc = "7: Universal Asynchronous Receiver/Transmitter 0"]
82    UART0 = 7,
83    #[doc = "8: Ethernet Media Access Control"]
84    EMAC = 8,
85    #[doc = "9: ??"]
86    CAM = 9,
87    #[doc = "10: ??"]
88    ANALOG = 10,
89    #[doc = "11: Generic Purpose Input/Output"]
90    GPIO = 11,
91    #[doc = "12: ??"]
92    SDIO = 12,
93    #[doc = "16: Pulse-Width Modulation module 0"]
94    PWM0 = 16,
95    #[doc = "17: ??"]
96    JTAG = 17,
97    #[doc = "18: Universal Asynchronous Receiver/Transmitter 1"]
98    UART1 = 18,
99    #[doc = "19: Pulse-Width Modulation 1"]
100    PWM1 = 19,
101    #[doc = "20: Serial Peripheral Interface 1"]
102    SPI1 = 20,
103    #[doc = "21: Inter-IC Sound 1"]
104    I2S1 = 21,
105    #[doc = "22: ??"]
106    DBI_B = 22,
107    #[doc = "23: ??"]
108    DBI_C = 23,
109    #[doc = "24: ??"]
110    QSPI = 24,
111    #[doc = "25: Audio Pulse-Width Modulation"]
112    APWM = 25,
113    #[doc = "31: Clock output"]
114    CLOCK_OUT = 31,
115}
116impl From<ALTERNATE_A> for u8 {
117    #[inline(always)]
118    fn from(variant: ALTERNATE_A) -> Self {
119        variant as _
120    }
121}
122impl ALTERNATE_R {
123    #[doc = "Get enumerated values variant"]
124    #[inline(always)]
125    pub fn variant(&self) -> Option<ALTERNATE_A> {
126        match self.bits {
127            0 => Some(ALTERNATE_A::SDH),
128            1 => Some(ALTERNATE_A::SPI0),
129            2 => Some(ALTERNATE_A::FLASH),
130            3 => Some(ALTERNATE_A::I2S0),
131            4 => Some(ALTERNATE_A::PDM),
132            5 => Some(ALTERNATE_A::I2C0),
133            6 => Some(ALTERNATE_A::I2C1),
134            7 => Some(ALTERNATE_A::UART0),
135            8 => Some(ALTERNATE_A::EMAC),
136            9 => Some(ALTERNATE_A::CAM),
137            10 => Some(ALTERNATE_A::ANALOG),
138            11 => Some(ALTERNATE_A::GPIO),
139            12 => Some(ALTERNATE_A::SDIO),
140            16 => Some(ALTERNATE_A::PWM0),
141            17 => Some(ALTERNATE_A::JTAG),
142            18 => Some(ALTERNATE_A::UART1),
143            19 => Some(ALTERNATE_A::PWM1),
144            20 => Some(ALTERNATE_A::SPI1),
145            21 => Some(ALTERNATE_A::I2S1),
146            22 => Some(ALTERNATE_A::DBI_B),
147            23 => Some(ALTERNATE_A::DBI_C),
148            24 => Some(ALTERNATE_A::QSPI),
149            25 => Some(ALTERNATE_A::APWM),
150            31 => Some(ALTERNATE_A::CLOCK_OUT),
151            _ => None,
152        }
153    }
154    #[doc = "Checks if the value of the field is `SDH`"]
155    #[inline(always)]
156    pub fn is_sdh(&self) -> bool {
157        *self == ALTERNATE_A::SDH
158    }
159    #[doc = "Checks if the value of the field is `SPI0`"]
160    #[inline(always)]
161    pub fn is_spi0(&self) -> bool {
162        *self == ALTERNATE_A::SPI0
163    }
164    #[doc = "Checks if the value of the field is `FLASH`"]
165    #[inline(always)]
166    pub fn is_flash(&self) -> bool {
167        *self == ALTERNATE_A::FLASH
168    }
169    #[doc = "Checks if the value of the field is `I2S0`"]
170    #[inline(always)]
171    pub fn is_i2s0(&self) -> bool {
172        *self == ALTERNATE_A::I2S0
173    }
174    #[doc = "Checks if the value of the field is `PDM`"]
175    #[inline(always)]
176    pub fn is_pdm(&self) -> bool {
177        *self == ALTERNATE_A::PDM
178    }
179    #[doc = "Checks if the value of the field is `I2C0`"]
180    #[inline(always)]
181    pub fn is_i2c0(&self) -> bool {
182        *self == ALTERNATE_A::I2C0
183    }
184    #[doc = "Checks if the value of the field is `I2C1`"]
185    #[inline(always)]
186    pub fn is_i2c1(&self) -> bool {
187        *self == ALTERNATE_A::I2C1
188    }
189    #[doc = "Checks if the value of the field is `UART0`"]
190    #[inline(always)]
191    pub fn is_uart0(&self) -> bool {
192        *self == ALTERNATE_A::UART0
193    }
194    #[doc = "Checks if the value of the field is `EMAC`"]
195    #[inline(always)]
196    pub fn is_emac(&self) -> bool {
197        *self == ALTERNATE_A::EMAC
198    }
199    #[doc = "Checks if the value of the field is `CAM`"]
200    #[inline(always)]
201    pub fn is_cam(&self) -> bool {
202        *self == ALTERNATE_A::CAM
203    }
204    #[doc = "Checks if the value of the field is `ANALOG`"]
205    #[inline(always)]
206    pub fn is_analog(&self) -> bool {
207        *self == ALTERNATE_A::ANALOG
208    }
209    #[doc = "Checks if the value of the field is `GPIO`"]
210    #[inline(always)]
211    pub fn is_gpio(&self) -> bool {
212        *self == ALTERNATE_A::GPIO
213    }
214    #[doc = "Checks if the value of the field is `SDIO`"]
215    #[inline(always)]
216    pub fn is_sdio(&self) -> bool {
217        *self == ALTERNATE_A::SDIO
218    }
219    #[doc = "Checks if the value of the field is `PWM0`"]
220    #[inline(always)]
221    pub fn is_pwm0(&self) -> bool {
222        *self == ALTERNATE_A::PWM0
223    }
224    #[doc = "Checks if the value of the field is `JTAG`"]
225    #[inline(always)]
226    pub fn is_jtag(&self) -> bool {
227        *self == ALTERNATE_A::JTAG
228    }
229    #[doc = "Checks if the value of the field is `UART1`"]
230    #[inline(always)]
231    pub fn is_uart1(&self) -> bool {
232        *self == ALTERNATE_A::UART1
233    }
234    #[doc = "Checks if the value of the field is `PWM1`"]
235    #[inline(always)]
236    pub fn is_pwm1(&self) -> bool {
237        *self == ALTERNATE_A::PWM1
238    }
239    #[doc = "Checks if the value of the field is `SPI1`"]
240    #[inline(always)]
241    pub fn is_spi1(&self) -> bool {
242        *self == ALTERNATE_A::SPI1
243    }
244    #[doc = "Checks if the value of the field is `I2S1`"]
245    #[inline(always)]
246    pub fn is_i2s1(&self) -> bool {
247        *self == ALTERNATE_A::I2S1
248    }
249    #[doc = "Checks if the value of the field is `DBI_B`"]
250    #[inline(always)]
251    pub fn is_dbi_b(&self) -> bool {
252        *self == ALTERNATE_A::DBI_B
253    }
254    #[doc = "Checks if the value of the field is `DBI_C`"]
255    #[inline(always)]
256    pub fn is_dbi_c(&self) -> bool {
257        *self == ALTERNATE_A::DBI_C
258    }
259    #[doc = "Checks if the value of the field is `QSPI`"]
260    #[inline(always)]
261    pub fn is_qspi(&self) -> bool {
262        *self == ALTERNATE_A::QSPI
263    }
264    #[doc = "Checks if the value of the field is `APWM`"]
265    #[inline(always)]
266    pub fn is_apwm(&self) -> bool {
267        *self == ALTERNATE_A::APWM
268    }
269    #[doc = "Checks if the value of the field is `CLOCK_OUT`"]
270    #[inline(always)]
271    pub fn is_clock_out(&self) -> bool {
272        *self == ALTERNATE_A::CLOCK_OUT
273    }
274}
275#[doc = "Field `alternate` writer - Pin alternate function switch"]
276pub type ALTERNATE_W<'a, const O: u8> =
277    crate::FieldWriter<'a, u32, GPIO_CONFIG_SPEC, u8, ALTERNATE_A, 5, O>;
278impl<'a, const O: u8> ALTERNATE_W<'a, O> {
279    #[doc = "Secure Digital host"]
280    #[inline(always)]
281    pub fn sdh(self) -> &'a mut W {
282        self.variant(ALTERNATE_A::SDH)
283    }
284    #[doc = "Serial Peripheral Interface 0"]
285    #[inline(always)]
286    pub fn spi0(self) -> &'a mut W {
287        self.variant(ALTERNATE_A::SPI0)
288    }
289    #[doc = "Flash control"]
290    #[inline(always)]
291    pub fn flash(self) -> &'a mut W {
292        self.variant(ALTERNATE_A::FLASH)
293    }
294    #[doc = "Inter-IC Sound 0"]
295    #[inline(always)]
296    pub fn i2s0(self) -> &'a mut W {
297        self.variant(ALTERNATE_A::I2S0)
298    }
299    #[doc = "Pulse Density Modulation"]
300    #[inline(always)]
301    pub fn pdm(self) -> &'a mut W {
302        self.variant(ALTERNATE_A::PDM)
303    }
304    #[doc = "Inter-Integrated Circuit bus 0"]
305    #[inline(always)]
306    pub fn i2c0(self) -> &'a mut W {
307        self.variant(ALTERNATE_A::I2C0)
308    }
309    #[doc = "Inter-Integrated Circuit bus 1"]
310    #[inline(always)]
311    pub fn i2c1(self) -> &'a mut W {
312        self.variant(ALTERNATE_A::I2C1)
313    }
314    #[doc = "Universal Asynchronous Receiver/Transmitter 0"]
315    #[inline(always)]
316    pub fn uart0(self) -> &'a mut W {
317        self.variant(ALTERNATE_A::UART0)
318    }
319    #[doc = "Ethernet Media Access Control"]
320    #[inline(always)]
321    pub fn emac(self) -> &'a mut W {
322        self.variant(ALTERNATE_A::EMAC)
323    }
324    #[doc = "??"]
325    #[inline(always)]
326    pub fn cam(self) -> &'a mut W {
327        self.variant(ALTERNATE_A::CAM)
328    }
329    #[doc = "??"]
330    #[inline(always)]
331    pub fn analog(self) -> &'a mut W {
332        self.variant(ALTERNATE_A::ANALOG)
333    }
334    #[doc = "Generic Purpose Input/Output"]
335    #[inline(always)]
336    pub fn gpio(self) -> &'a mut W {
337        self.variant(ALTERNATE_A::GPIO)
338    }
339    #[doc = "??"]
340    #[inline(always)]
341    pub fn sdio(self) -> &'a mut W {
342        self.variant(ALTERNATE_A::SDIO)
343    }
344    #[doc = "Pulse-Width Modulation module 0"]
345    #[inline(always)]
346    pub fn pwm0(self) -> &'a mut W {
347        self.variant(ALTERNATE_A::PWM0)
348    }
349    #[doc = "??"]
350    #[inline(always)]
351    pub fn jtag(self) -> &'a mut W {
352        self.variant(ALTERNATE_A::JTAG)
353    }
354    #[doc = "Universal Asynchronous Receiver/Transmitter 1"]
355    #[inline(always)]
356    pub fn uart1(self) -> &'a mut W {
357        self.variant(ALTERNATE_A::UART1)
358    }
359    #[doc = "Pulse-Width Modulation 1"]
360    #[inline(always)]
361    pub fn pwm1(self) -> &'a mut W {
362        self.variant(ALTERNATE_A::PWM1)
363    }
364    #[doc = "Serial Peripheral Interface 1"]
365    #[inline(always)]
366    pub fn spi1(self) -> &'a mut W {
367        self.variant(ALTERNATE_A::SPI1)
368    }
369    #[doc = "Inter-IC Sound 1"]
370    #[inline(always)]
371    pub fn i2s1(self) -> &'a mut W {
372        self.variant(ALTERNATE_A::I2S1)
373    }
374    #[doc = "??"]
375    #[inline(always)]
376    pub fn dbi_b(self) -> &'a mut W {
377        self.variant(ALTERNATE_A::DBI_B)
378    }
379    #[doc = "??"]
380    #[inline(always)]
381    pub fn dbi_c(self) -> &'a mut W {
382        self.variant(ALTERNATE_A::DBI_C)
383    }
384    #[doc = "??"]
385    #[inline(always)]
386    pub fn qspi(self) -> &'a mut W {
387        self.variant(ALTERNATE_A::QSPI)
388    }
389    #[doc = "Audio Pulse-Width Modulation"]
390    #[inline(always)]
391    pub fn apwm(self) -> &'a mut W {
392        self.variant(ALTERNATE_A::APWM)
393    }
394    #[doc = "Clock output"]
395    #[inline(always)]
396    pub fn clock_out(self) -> &'a mut W {
397        self.variant(ALTERNATE_A::CLOCK_OUT)
398    }
399}
400#[doc = "Field `interrupt_mode` reader - Select pin interrupt mode"]
401pub type INTERRUPT_MODE_R = crate::FieldReader<u8, INTERRUPT_MODE_A>;
402#[doc = "Select pin interrupt mode\n\nValue on reset: 0"]
403#[derive(Clone, Copy, Debug, PartialEq, Eq)]
404#[repr(u8)]
405pub enum INTERRUPT_MODE_A {
406    #[doc = "0: Synchronous interrupt in falling edge"]
407    SYNC_FALLING_EDGE = 0,
408    #[doc = "1: Synchronous interrupt in rising edge"]
409    SYNC_RISING_EDGE = 1,
410    #[doc = "2: Synchronous interrupt in low level"]
411    SYNC_LOW_LEVEL = 2,
412    #[doc = "3: Synchronous interrupt in high level"]
413    SYNC_HIGH_LEVEL = 3,
414    #[doc = "4: Synchronous interrupt in both rising and falling edges"]
415    SYNC_BOTH_EDGES = 4,
416    #[doc = "8: Asynchronous interrupt in falling edge"]
417    ASYNC_FALLING_EDGE = 8,
418    #[doc = "9: Asynchronous interrupt in rising edge"]
419    ASYNC_RISING_EDGE = 9,
420    #[doc = "10: Asynchronous interrupt in low level"]
421    ASYNC_LOW_LEVEL = 10,
422    #[doc = "11: Asynchronous interrupt in high level"]
423    ASYNC_HIGH_LEVEL = 11,
424}
425impl From<INTERRUPT_MODE_A> for u8 {
426    #[inline(always)]
427    fn from(variant: INTERRUPT_MODE_A) -> Self {
428        variant as _
429    }
430}
431impl INTERRUPT_MODE_R {
432    #[doc = "Get enumerated values variant"]
433    #[inline(always)]
434    pub fn variant(&self) -> Option<INTERRUPT_MODE_A> {
435        match self.bits {
436            0 => Some(INTERRUPT_MODE_A::SYNC_FALLING_EDGE),
437            1 => Some(INTERRUPT_MODE_A::SYNC_RISING_EDGE),
438            2 => Some(INTERRUPT_MODE_A::SYNC_LOW_LEVEL),
439            3 => Some(INTERRUPT_MODE_A::SYNC_HIGH_LEVEL),
440            4 => Some(INTERRUPT_MODE_A::SYNC_BOTH_EDGES),
441            8 => Some(INTERRUPT_MODE_A::ASYNC_FALLING_EDGE),
442            9 => Some(INTERRUPT_MODE_A::ASYNC_RISING_EDGE),
443            10 => Some(INTERRUPT_MODE_A::ASYNC_LOW_LEVEL),
444            11 => Some(INTERRUPT_MODE_A::ASYNC_HIGH_LEVEL),
445            _ => None,
446        }
447    }
448    #[doc = "Checks if the value of the field is `SYNC_FALLING_EDGE`"]
449    #[inline(always)]
450    pub fn is_sync_falling_edge(&self) -> bool {
451        *self == INTERRUPT_MODE_A::SYNC_FALLING_EDGE
452    }
453    #[doc = "Checks if the value of the field is `SYNC_RISING_EDGE`"]
454    #[inline(always)]
455    pub fn is_sync_rising_edge(&self) -> bool {
456        *self == INTERRUPT_MODE_A::SYNC_RISING_EDGE
457    }
458    #[doc = "Checks if the value of the field is `SYNC_LOW_LEVEL`"]
459    #[inline(always)]
460    pub fn is_sync_low_level(&self) -> bool {
461        *self == INTERRUPT_MODE_A::SYNC_LOW_LEVEL
462    }
463    #[doc = "Checks if the value of the field is `SYNC_HIGH_LEVEL`"]
464    #[inline(always)]
465    pub fn is_sync_high_level(&self) -> bool {
466        *self == INTERRUPT_MODE_A::SYNC_HIGH_LEVEL
467    }
468    #[doc = "Checks if the value of the field is `SYNC_BOTH_EDGES`"]
469    #[inline(always)]
470    pub fn is_sync_both_edges(&self) -> bool {
471        *self == INTERRUPT_MODE_A::SYNC_BOTH_EDGES
472    }
473    #[doc = "Checks if the value of the field is `ASYNC_FALLING_EDGE`"]
474    #[inline(always)]
475    pub fn is_async_falling_edge(&self) -> bool {
476        *self == INTERRUPT_MODE_A::ASYNC_FALLING_EDGE
477    }
478    #[doc = "Checks if the value of the field is `ASYNC_RISING_EDGE`"]
479    #[inline(always)]
480    pub fn is_async_rising_edge(&self) -> bool {
481        *self == INTERRUPT_MODE_A::ASYNC_RISING_EDGE
482    }
483    #[doc = "Checks if the value of the field is `ASYNC_LOW_LEVEL`"]
484    #[inline(always)]
485    pub fn is_async_low_level(&self) -> bool {
486        *self == INTERRUPT_MODE_A::ASYNC_LOW_LEVEL
487    }
488    #[doc = "Checks if the value of the field is `ASYNC_HIGH_LEVEL`"]
489    #[inline(always)]
490    pub fn is_async_high_level(&self) -> bool {
491        *self == INTERRUPT_MODE_A::ASYNC_HIGH_LEVEL
492    }
493}
494#[doc = "Field `interrupt_mode` writer - Select pin interrupt mode"]
495pub type INTERRUPT_MODE_W<'a, const O: u8> =
496    crate::FieldWriter<'a, u32, GPIO_CONFIG_SPEC, u8, INTERRUPT_MODE_A, 4, O>;
497impl<'a, const O: u8> INTERRUPT_MODE_W<'a, O> {
498    #[doc = "Synchronous interrupt in falling edge"]
499    #[inline(always)]
500    pub fn sync_falling_edge(self) -> &'a mut W {
501        self.variant(INTERRUPT_MODE_A::SYNC_FALLING_EDGE)
502    }
503    #[doc = "Synchronous interrupt in rising edge"]
504    #[inline(always)]
505    pub fn sync_rising_edge(self) -> &'a mut W {
506        self.variant(INTERRUPT_MODE_A::SYNC_RISING_EDGE)
507    }
508    #[doc = "Synchronous interrupt in low level"]
509    #[inline(always)]
510    pub fn sync_low_level(self) -> &'a mut W {
511        self.variant(INTERRUPT_MODE_A::SYNC_LOW_LEVEL)
512    }
513    #[doc = "Synchronous interrupt in high level"]
514    #[inline(always)]
515    pub fn sync_high_level(self) -> &'a mut W {
516        self.variant(INTERRUPT_MODE_A::SYNC_HIGH_LEVEL)
517    }
518    #[doc = "Synchronous interrupt in both rising and falling edges"]
519    #[inline(always)]
520    pub fn sync_both_edges(self) -> &'a mut W {
521        self.variant(INTERRUPT_MODE_A::SYNC_BOTH_EDGES)
522    }
523    #[doc = "Asynchronous interrupt in falling edge"]
524    #[inline(always)]
525    pub fn async_falling_edge(self) -> &'a mut W {
526        self.variant(INTERRUPT_MODE_A::ASYNC_FALLING_EDGE)
527    }
528    #[doc = "Asynchronous interrupt in rising edge"]
529    #[inline(always)]
530    pub fn async_rising_edge(self) -> &'a mut W {
531        self.variant(INTERRUPT_MODE_A::ASYNC_RISING_EDGE)
532    }
533    #[doc = "Asynchronous interrupt in low level"]
534    #[inline(always)]
535    pub fn async_low_level(self) -> &'a mut W {
536        self.variant(INTERRUPT_MODE_A::ASYNC_LOW_LEVEL)
537    }
538    #[doc = "Asynchronous interrupt in high level"]
539    #[inline(always)]
540    pub fn async_high_level(self) -> &'a mut W {
541        self.variant(INTERRUPT_MODE_A::ASYNC_HIGH_LEVEL)
542    }
543}
544#[doc = "Field `interrupt_clear` reader - Clear pin interrupt flag"]
545pub type INTERRUPT_CLEAR_R = crate::BitReader<bool>;
546#[doc = "Field `interrupt_clear` writer - Clear pin interrupt flag"]
547pub type INTERRUPT_CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
548#[doc = "Field `interrupt_state` reader - Pin interrupt state"]
549pub type INTERRUPT_STATE_R = crate::BitReader<bool>;
550#[doc = "Field `interrupt_mask` reader - Pin interrupt mask"]
551pub type INTERRUPT_MASK_R = crate::BitReader<bool>;
552#[doc = "Field `interrupt_mask` writer - Pin interrupt mask"]
553pub type INTERRUPT_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
554#[doc = "Field `output_value` reader - Output value"]
555pub type OUTPUT_VALUE_R = crate::BitReader<bool>;
556#[doc = "Field `output_value` writer - Output value"]
557pub type OUTPUT_VALUE_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
558#[doc = "Field `output_set` writer - Set output value to 1\n\n When sets and clears at the same, only set will take effect."]
559pub type OUTPUT_SET_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
560#[doc = "Field `output_clear` writer - Clear output value to 0\n\n When sets and clears at the same, only set will take effect."]
561pub type OUTPUT_CLEAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, GPIO_CONFIG_SPEC, bool, O>;
562#[doc = "Field `input_value` reader - Input value"]
563pub type INPUT_VALUE_R = crate::BitReader<bool>;
564#[doc = "Field `pin_mode` reader - Pin input/output mode switch"]
565pub type PIN_MODE_R = crate::FieldReader<u8, PIN_MODE_A>;
566#[doc = "Pin input/output mode switch\n\nValue on reset: 0"]
567#[derive(Clone, Copy, Debug, PartialEq, Eq)]
568#[repr(u8)]
569pub enum PIN_MODE_A {
570    #[doc = "0: Output by `output_value` field"]
571    OUTPUT_VALUE = 0,
572    #[doc = "1: Output set by `output_set` and `output_clear` fields"]
573    SET_CLEAR = 1,
574    #[doc = "2: Source from GPIO DMA, output by `output_value`"]
575    DMA_OUTPUT_VALUE = 2,
576    #[doc = "3: Source from GPIO DMA, set by `output_set` and `output_clear`"]
577    DMA_SET_CLEAR = 3,
578}
579impl From<PIN_MODE_A> for u8 {
580    #[inline(always)]
581    fn from(variant: PIN_MODE_A) -> Self {
582        variant as _
583    }
584}
585impl PIN_MODE_R {
586    #[doc = "Get enumerated values variant"]
587    #[inline(always)]
588    pub fn variant(&self) -> PIN_MODE_A {
589        match self.bits {
590            0 => PIN_MODE_A::OUTPUT_VALUE,
591            1 => PIN_MODE_A::SET_CLEAR,
592            2 => PIN_MODE_A::DMA_OUTPUT_VALUE,
593            3 => PIN_MODE_A::DMA_SET_CLEAR,
594            _ => unreachable!(),
595        }
596    }
597    #[doc = "Checks if the value of the field is `OUTPUT_VALUE`"]
598    #[inline(always)]
599    pub fn is_output_value(&self) -> bool {
600        *self == PIN_MODE_A::OUTPUT_VALUE
601    }
602    #[doc = "Checks if the value of the field is `SET_CLEAR`"]
603    #[inline(always)]
604    pub fn is_set_clear(&self) -> bool {
605        *self == PIN_MODE_A::SET_CLEAR
606    }
607    #[doc = "Checks if the value of the field is `DMA_OUTPUT_VALUE`"]
608    #[inline(always)]
609    pub fn is_dma_output_value(&self) -> bool {
610        *self == PIN_MODE_A::DMA_OUTPUT_VALUE
611    }
612    #[doc = "Checks if the value of the field is `DMA_SET_CLEAR`"]
613    #[inline(always)]
614    pub fn is_dma_set_clear(&self) -> bool {
615        *self == PIN_MODE_A::DMA_SET_CLEAR
616    }
617}
618#[doc = "Field `pin_mode` writer - Pin input/output mode switch"]
619pub type PIN_MODE_W<'a, const O: u8> =
620    crate::FieldWriterSafe<'a, u32, GPIO_CONFIG_SPEC, u8, PIN_MODE_A, 2, O>;
621impl<'a, const O: u8> PIN_MODE_W<'a, O> {
622    #[doc = "Output by `output_value` field"]
623    #[inline(always)]
624    pub fn output_value(self) -> &'a mut W {
625        self.variant(PIN_MODE_A::OUTPUT_VALUE)
626    }
627    #[doc = "Output set by `output_set` and `output_clear` fields"]
628    #[inline(always)]
629    pub fn set_clear(self) -> &'a mut W {
630        self.variant(PIN_MODE_A::SET_CLEAR)
631    }
632    #[doc = "Source from GPIO DMA, output by `output_value`"]
633    #[inline(always)]
634    pub fn dma_output_value(self) -> &'a mut W {
635        self.variant(PIN_MODE_A::DMA_OUTPUT_VALUE)
636    }
637    #[doc = "Source from GPIO DMA, set by `output_set` and `output_clear`"]
638    #[inline(always)]
639    pub fn dma_set_clear(self) -> &'a mut W {
640        self.variant(PIN_MODE_A::DMA_SET_CLEAR)
641    }
642}
643impl R {
644    #[doc = "Bit 0 - Enable input signal"]
645    #[inline(always)]
646    pub fn input_function(&self) -> INPUT_FUNCTION_R {
647        INPUT_FUNCTION_R::new((self.bits & 1) != 0)
648    }
649    #[doc = "Bit 1 - Enable schmitt trigger"]
650    #[inline(always)]
651    pub fn schmitt(&self) -> SCHMITT_R {
652        SCHMITT_R::new(((self.bits >> 1) & 1) != 0)
653    }
654    #[doc = "Bits 2:3 - Drive strength"]
655    #[inline(always)]
656    pub fn drive(&self) -> DRIVE_R {
657        DRIVE_R::new(((self.bits >> 2) & 3) as u8)
658    }
659    #[doc = "Bit 4 - Enable internal pull-up"]
660    #[inline(always)]
661    pub fn pull_up(&self) -> PULL_UP_R {
662        PULL_UP_R::new(((self.bits >> 4) & 1) != 0)
663    }
664    #[doc = "Bit 5 - Enable internal pull-down"]
665    #[inline(always)]
666    pub fn pull_down(&self) -> PULL_DOWN_R {
667        PULL_DOWN_R::new(((self.bits >> 5) & 1) != 0)
668    }
669    #[doc = "Bit 6 - Enable output signal"]
670    #[inline(always)]
671    pub fn output_function(&self) -> OUTPUT_FUNCTION_R {
672        OUTPUT_FUNCTION_R::new(((self.bits >> 6) & 1) != 0)
673    }
674    #[doc = "Bits 8:12 - Pin alternate function switch"]
675    #[inline(always)]
676    pub fn alternate(&self) -> ALTERNATE_R {
677        ALTERNATE_R::new(((self.bits >> 8) & 0x1f) as u8)
678    }
679    #[doc = "Bits 16:19 - Select pin interrupt mode"]
680    #[inline(always)]
681    pub fn interrupt_mode(&self) -> INTERRUPT_MODE_R {
682        INTERRUPT_MODE_R::new(((self.bits >> 16) & 0x0f) as u8)
683    }
684    #[doc = "Bit 20 - Clear pin interrupt flag"]
685    #[inline(always)]
686    pub fn interrupt_clear(&self) -> INTERRUPT_CLEAR_R {
687        INTERRUPT_CLEAR_R::new(((self.bits >> 20) & 1) != 0)
688    }
689    #[doc = "Bit 21 - Pin interrupt state"]
690    #[inline(always)]
691    pub fn interrupt_state(&self) -> INTERRUPT_STATE_R {
692        INTERRUPT_STATE_R::new(((self.bits >> 21) & 1) != 0)
693    }
694    #[doc = "Bit 22 - Pin interrupt mask"]
695    #[inline(always)]
696    pub fn interrupt_mask(&self) -> INTERRUPT_MASK_R {
697        INTERRUPT_MASK_R::new(((self.bits >> 22) & 1) != 0)
698    }
699    #[doc = "Bit 24 - Output value"]
700    #[inline(always)]
701    pub fn output_value(&self) -> OUTPUT_VALUE_R {
702        OUTPUT_VALUE_R::new(((self.bits >> 24) & 1) != 0)
703    }
704    #[doc = "Bit 28 - Input value"]
705    #[inline(always)]
706    pub fn input_value(&self) -> INPUT_VALUE_R {
707        INPUT_VALUE_R::new(((self.bits >> 28) & 1) != 0)
708    }
709    #[doc = "Bits 30:31 - Pin input/output mode switch"]
710    #[inline(always)]
711    pub fn pin_mode(&self) -> PIN_MODE_R {
712        PIN_MODE_R::new(((self.bits >> 30) & 3) as u8)
713    }
714}
715impl W {
716    #[doc = "Bit 0 - Enable input signal"]
717    #[inline(always)]
718    #[must_use]
719    pub fn input_function(&mut self) -> INPUT_FUNCTION_W<0> {
720        INPUT_FUNCTION_W::new(self)
721    }
722    #[doc = "Bit 1 - Enable schmitt trigger"]
723    #[inline(always)]
724    #[must_use]
725    pub fn schmitt(&mut self) -> SCHMITT_W<1> {
726        SCHMITT_W::new(self)
727    }
728    #[doc = "Bits 2:3 - Drive strength"]
729    #[inline(always)]
730    #[must_use]
731    pub fn drive(&mut self) -> DRIVE_W<2> {
732        DRIVE_W::new(self)
733    }
734    #[doc = "Bit 4 - Enable internal pull-up"]
735    #[inline(always)]
736    #[must_use]
737    pub fn pull_up(&mut self) -> PULL_UP_W<4> {
738        PULL_UP_W::new(self)
739    }
740    #[doc = "Bit 5 - Enable internal pull-down"]
741    #[inline(always)]
742    #[must_use]
743    pub fn pull_down(&mut self) -> PULL_DOWN_W<5> {
744        PULL_DOWN_W::new(self)
745    }
746    #[doc = "Bit 6 - Enable output signal"]
747    #[inline(always)]
748    #[must_use]
749    pub fn output_function(&mut self) -> OUTPUT_FUNCTION_W<6> {
750        OUTPUT_FUNCTION_W::new(self)
751    }
752    #[doc = "Bits 8:12 - Pin alternate function switch"]
753    #[inline(always)]
754    #[must_use]
755    pub fn alternate(&mut self) -> ALTERNATE_W<8> {
756        ALTERNATE_W::new(self)
757    }
758    #[doc = "Bits 16:19 - Select pin interrupt mode"]
759    #[inline(always)]
760    #[must_use]
761    pub fn interrupt_mode(&mut self) -> INTERRUPT_MODE_W<16> {
762        INTERRUPT_MODE_W::new(self)
763    }
764    #[doc = "Bit 20 - Clear pin interrupt flag"]
765    #[inline(always)]
766    #[must_use]
767    pub fn interrupt_clear(&mut self) -> INTERRUPT_CLEAR_W<20> {
768        INTERRUPT_CLEAR_W::new(self)
769    }
770    #[doc = "Bit 22 - Pin interrupt mask"]
771    #[inline(always)]
772    #[must_use]
773    pub fn interrupt_mask(&mut self) -> INTERRUPT_MASK_W<22> {
774        INTERRUPT_MASK_W::new(self)
775    }
776    #[doc = "Bit 24 - Output value"]
777    #[inline(always)]
778    #[must_use]
779    pub fn output_value(&mut self) -> OUTPUT_VALUE_W<24> {
780        OUTPUT_VALUE_W::new(self)
781    }
782    #[doc = "Bit 25 - Set output value to 1\n\n When sets and clears at the same, only set will take effect."]
783    #[inline(always)]
784    #[must_use]
785    pub fn output_set(&mut self) -> OUTPUT_SET_W<25> {
786        OUTPUT_SET_W::new(self)
787    }
788    #[doc = "Bit 26 - Clear output value to 0\n\n When sets and clears at the same, only set will take effect."]
789    #[inline(always)]
790    #[must_use]
791    pub fn output_clear(&mut self) -> OUTPUT_CLEAR_W<26> {
792        OUTPUT_CLEAR_W::new(self)
793    }
794    #[doc = "Bits 30:31 - Pin input/output mode switch"]
795    #[inline(always)]
796    #[must_use]
797    pub fn pin_mode(&mut self) -> PIN_MODE_W<30> {
798        PIN_MODE_W::new(self)
799    }
800    #[doc = "Writes raw bits to the register."]
801    #[inline(always)]
802    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
803        self.0.bits(bits);
804        self
805    }
806}
807#[doc = "Generic Purpose Input/Output config\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpio_config](index.html) module"]
808pub struct GPIO_CONFIG_SPEC;
809impl crate::RegisterSpec for GPIO_CONFIG_SPEC {
810    type Ux = u32;
811}
812#[doc = "`read()` method returns [gpio_config::R](R) reader structure"]
813impl crate::Readable for GPIO_CONFIG_SPEC {
814    type Reader = R;
815}
816#[doc = "`write(|w| ..)` method takes [gpio_config::W](W) writer structure"]
817impl crate::Writable for GPIO_CONFIG_SPEC {
818    type Writer = W;
819    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
820    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
821}
822#[doc = "`reset()` method sets gpio_config[%s] to value 0"]
823impl crate::Resettable for GPIO_CONFIG_SPEC {
824    const RESET_VALUE: Self::Ux = 0;
825}
bl616_pac/glb/gpio_config.rs

bl616_pac/glb/
gpio_config.rs
