bl616_pac/uart/
interrupt_enable.rs1#[doc = "Register `interrupt_enable` reader"]
2pub struct R(crate::R<INTERRUPT_ENABLE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<INTERRUPT_ENABLE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<INTERRUPT_ENABLE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<INTERRUPT_ENABLE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `interrupt_enable` writer"]
17pub struct W(crate::W<INTERRUPT_ENABLE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<INTERRUPT_ENABLE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<INTERRUPT_ENABLE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<INTERRUPT_ENABLE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `transmit_transfer` reader - Transmit transfer signal interrupt enable"]
38pub use AUTO_BAUDRATE_FIVE_FIVE_R as TRANSMIT_TRANSFER_R;
39#[doc = "Field `receive_transfer` reader - Receive transfer signal interrupt enable"]
40pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_TRANSFER_R;
41#[doc = "Field `transmit_fifo_ready` reader - Transmit FIFO ready signal interrupt enable"]
42pub use AUTO_BAUDRATE_FIVE_FIVE_R as TRANSMIT_FIFO_READY_R;
43#[doc = "Field `receive_fifo_ready` reader - Receive FIFO ready signal interrupt enable"]
44pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_FIFO_READY_R;
45#[doc = "Field `receive_timeout` reader - Receive timed-out interrupt enable"]
46pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_TIMEOUT_R;
47#[doc = "Field `receive_parity` reader - Receive parity check failure interrupt enable"]
48pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_PARITY_R;
49#[doc = "Field `transmit_fifo_error` reader - Transmit FIFO overflow or underflow interrupt enable"]
50pub use AUTO_BAUDRATE_FIVE_FIVE_R as TRANSMIT_FIFO_ERROR_R;
51#[doc = "Field `receive_fifo_error` reader - Receive FIFO overflow or underflow interrupt enable"]
52pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_FIFO_ERROR_R;
53#[doc = "Field `receive_sync_error` reader - Receive LIN mode synchronization field error interrupt enable"]
54pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_SYNC_ERROR_R;
55#[doc = "Field `receive_byte_count` reader - Receive byte count reached interrupt enable"]
56pub use AUTO_BAUDRATE_FIVE_FIVE_R as RECEIVE_BYTE_COUNT_R;
57#[doc = "Field `auto_baudrate_start_bit` reader - Receive auto baudrate detection finished using start bit interrupt enable"]
58pub use AUTO_BAUDRATE_FIVE_FIVE_R as AUTO_BAUDRATE_START_BIT_R;
59#[doc = "Field `transmit_transfer` writer - Transmit transfer signal interrupt enable"]
60pub use AUTO_BAUDRATE_FIVE_FIVE_W as TRANSMIT_TRANSFER_W;
61#[doc = "Field `receive_transfer` writer - Receive transfer signal interrupt enable"]
62pub use AUTO_BAUDRATE_FIVE_FIVE_W as RECEIVE_TRANSFER_W;
63#[doc = "Field `transmit_fifo_ready` writer - Transmit FIFO ready signal interrupt enable"]
64pub use AUTO_BAUDRATE_FIVE_FIVE_W as TRANSMIT_FIFO_READY_W;
65#[doc = "Field `receive_fifo_ready` writer - Receive FIFO ready signal interrupt enable"]
66pub use AUTO_BAUDRATE_FIVE_FIVE_W as RECEIVE_FIFO_READY_W;
67#[doc = "Field `receive_timeout` writer - Receive timed-out interrupt enable"]
68pub use AUTO_BAUDRATE_FIVE_FIVE_W as RECEIVE_TIMEOUT_W;
69#[doc = "Field `receive_parity` writer - Receive parity check failure interrupt enable"]
70pub use AUTO_BAUDRATE_FIVE_FIVE_W as RECEIVE_PARITY_W;
71#[doc = "Field `transmit_fifo_error` writer - Transmit FIFO overflow or underflow interrupt enable"]
72pub use AUTO_BAUDRATE_FIVE_FIVE_W as TRANSMIT_FIFO_ERROR_W;
73#[doc = "Field `receive_fifo_error` writer - Receive FIFO overflow or underflow interrupt enable"]
74pub use AUTO_BAUDRATE_FIVE_FIVE_W as RECEIVE_FIFO_ERROR_W;
75#[doc = "Field `receive_sync_error` writer - Receive LIN mode synchronization field error interrupt enable"]
76pub use AUTO_BAUDRATE_FIVE_FIVE_W as RECEIVE_SYNC_ERROR_W;
77#[doc = "Field `receive_byte_count` writer - Receive byte count reached interrupt enable"]
78pub use AUTO_BAUDRATE_FIVE_FIVE_W as RECEIVE_BYTE_COUNT_W;
79#[doc = "Field `auto_baudrate_start_bit` writer - Receive auto baudrate detection finished using start bit interrupt enable"]
80pub use AUTO_BAUDRATE_FIVE_FIVE_W as AUTO_BAUDRATE_START_BIT_W;
81#[doc = "Field `auto_baudrate_five_five` reader - Receive auto baudrate detection finished using 0x55 interrupt enable"]
82pub type AUTO_BAUDRATE_FIVE_FIVE_R = crate::BitReader<INTERRUPT_ENABLE_A>;
83#[doc = "Receive auto baudrate detection finished using 0x55 interrupt enable\n\nValue on reset: 0"]
84#[derive(Clone, Copy, Debug, PartialEq, Eq)]
85pub enum INTERRUPT_ENABLE_A {
86 #[doc = "1: Enable interrupt"]
87 ENABLE = 1,
88 #[doc = "0: Disable interrupt"]
89 DISABLE = 0,
90}
91impl From<INTERRUPT_ENABLE_A> for bool {
92 #[inline(always)]
93 fn from(variant: INTERRUPT_ENABLE_A) -> Self {
94 variant as u8 != 0
95 }
96}
97impl AUTO_BAUDRATE_FIVE_FIVE_R {
98 #[doc = "Get enumerated values variant"]
99 #[inline(always)]
100 pub fn variant(&self) -> INTERRUPT_ENABLE_A {
101 match self.bits {
102 true => INTERRUPT_ENABLE_A::ENABLE,
103 false => INTERRUPT_ENABLE_A::DISABLE,
104 }
105 }
106 #[doc = "Checks if the value of the field is `ENABLE`"]
107 #[inline(always)]
108 pub fn is_enable(&self) -> bool {
109 *self == INTERRUPT_ENABLE_A::ENABLE
110 }
111 #[doc = "Checks if the value of the field is `DISABLE`"]
112 #[inline(always)]
113 pub fn is_disable(&self) -> bool {
114 *self == INTERRUPT_ENABLE_A::DISABLE
115 }
116}
117#[doc = "Field `auto_baudrate_five_five` writer - Receive auto baudrate detection finished using 0x55 interrupt enable"]
118pub type AUTO_BAUDRATE_FIVE_FIVE_W<'a, const O: u8> =
119 crate::BitWriter<'a, u32, INTERRUPT_ENABLE_SPEC, INTERRUPT_ENABLE_A, O>;
120impl<'a, const O: u8> AUTO_BAUDRATE_FIVE_FIVE_W<'a, O> {
121 #[doc = "Enable interrupt"]
122 #[inline(always)]
123 pub fn enable(self) -> &'a mut W {
124 self.variant(INTERRUPT_ENABLE_A::ENABLE)
125 }
126 #[doc = "Disable interrupt"]
127 #[inline(always)]
128 pub fn disable(self) -> &'a mut W {
129 self.variant(INTERRUPT_ENABLE_A::DISABLE)
130 }
131}
132impl R {
133 #[doc = "Bit 0 - Transmit transfer signal interrupt enable"]
134 #[inline(always)]
135 pub fn transmit_transfer(&self) -> TRANSMIT_TRANSFER_R {
136 TRANSMIT_TRANSFER_R::new((self.bits & 1) != 0)
137 }
138 #[doc = "Bit 1 - Receive transfer signal interrupt enable"]
139 #[inline(always)]
140 pub fn receive_transfer(&self) -> RECEIVE_TRANSFER_R {
141 RECEIVE_TRANSFER_R::new(((self.bits >> 1) & 1) != 0)
142 }
143 #[doc = "Bit 2 - Transmit FIFO ready signal interrupt enable"]
144 #[inline(always)]
145 pub fn transmit_fifo_ready(&self) -> TRANSMIT_FIFO_READY_R {
146 TRANSMIT_FIFO_READY_R::new(((self.bits >> 2) & 1) != 0)
147 }
148 #[doc = "Bit 3 - Receive FIFO ready signal interrupt enable"]
149 #[inline(always)]
150 pub fn receive_fifo_ready(&self) -> RECEIVE_FIFO_READY_R {
151 RECEIVE_FIFO_READY_R::new(((self.bits >> 3) & 1) != 0)
152 }
153 #[doc = "Bit 4 - Receive timed-out interrupt enable"]
154 #[inline(always)]
155 pub fn receive_timeout(&self) -> RECEIVE_TIMEOUT_R {
156 RECEIVE_TIMEOUT_R::new(((self.bits >> 4) & 1) != 0)
157 }
158 #[doc = "Bit 5 - Receive parity check failure interrupt enable"]
159 #[inline(always)]
160 pub fn receive_parity(&self) -> RECEIVE_PARITY_R {
161 RECEIVE_PARITY_R::new(((self.bits >> 5) & 1) != 0)
162 }
163 #[doc = "Bit 6 - Transmit FIFO overflow or underflow interrupt enable"]
164 #[inline(always)]
165 pub fn transmit_fifo_error(&self) -> TRANSMIT_FIFO_ERROR_R {
166 TRANSMIT_FIFO_ERROR_R::new(((self.bits >> 6) & 1) != 0)
167 }
168 #[doc = "Bit 7 - Receive FIFO overflow or underflow interrupt enable"]
169 #[inline(always)]
170 pub fn receive_fifo_error(&self) -> RECEIVE_FIFO_ERROR_R {
171 RECEIVE_FIFO_ERROR_R::new(((self.bits >> 7) & 1) != 0)
172 }
173 #[doc = "Bit 8 - Receive LIN mode synchronization field error interrupt enable"]
174 #[inline(always)]
175 pub fn receive_sync_error(&self) -> RECEIVE_SYNC_ERROR_R {
176 RECEIVE_SYNC_ERROR_R::new(((self.bits >> 8) & 1) != 0)
177 }
178 #[doc = "Bit 9 - Receive byte count reached interrupt enable"]
179 #[inline(always)]
180 pub fn receive_byte_count(&self) -> RECEIVE_BYTE_COUNT_R {
181 RECEIVE_BYTE_COUNT_R::new(((self.bits >> 9) & 1) != 0)
182 }
183 #[doc = "Bit 10 - Receive auto baudrate detection finished using start bit interrupt enable"]
184 #[inline(always)]
185 pub fn auto_baudrate_start_bit(&self) -> AUTO_BAUDRATE_START_BIT_R {
186 AUTO_BAUDRATE_START_BIT_R::new(((self.bits >> 10) & 1) != 0)
187 }
188 #[doc = "Bit 11 - Receive auto baudrate detection finished using 0x55 interrupt enable"]
189 #[inline(always)]
190 pub fn auto_baudrate_five_five(&self) -> AUTO_BAUDRATE_FIVE_FIVE_R {
191 AUTO_BAUDRATE_FIVE_FIVE_R::new(((self.bits >> 11) & 1) != 0)
192 }
193}
194impl W {
195 #[doc = "Bit 0 - Transmit transfer signal interrupt enable"]
196 #[inline(always)]
197 #[must_use]
198 pub fn transmit_transfer(&mut self) -> TRANSMIT_TRANSFER_W<0> {
199 TRANSMIT_TRANSFER_W::new(self)
200 }
201 #[doc = "Bit 1 - Receive transfer signal interrupt enable"]
202 #[inline(always)]
203 #[must_use]
204 pub fn receive_transfer(&mut self) -> RECEIVE_TRANSFER_W<1> {
205 RECEIVE_TRANSFER_W::new(self)
206 }
207 #[doc = "Bit 2 - Transmit FIFO ready signal interrupt enable"]
208 #[inline(always)]
209 #[must_use]
210 pub fn transmit_fifo_ready(&mut self) -> TRANSMIT_FIFO_READY_W<2> {
211 TRANSMIT_FIFO_READY_W::new(self)
212 }
213 #[doc = "Bit 3 - Receive FIFO ready signal interrupt enable"]
214 #[inline(always)]
215 #[must_use]
216 pub fn receive_fifo_ready(&mut self) -> RECEIVE_FIFO_READY_W<3> {
217 RECEIVE_FIFO_READY_W::new(self)
218 }
219 #[doc = "Bit 4 - Receive timed-out interrupt enable"]
220 #[inline(always)]
221 #[must_use]
222 pub fn receive_timeout(&mut self) -> RECEIVE_TIMEOUT_W<4> {
223 RECEIVE_TIMEOUT_W::new(self)
224 }
225 #[doc = "Bit 5 - Receive parity check failure interrupt enable"]
226 #[inline(always)]
227 #[must_use]
228 pub fn receive_parity(&mut self) -> RECEIVE_PARITY_W<5> {
229 RECEIVE_PARITY_W::new(self)
230 }
231 #[doc = "Bit 6 - Transmit FIFO overflow or underflow interrupt enable"]
232 #[inline(always)]
233 #[must_use]
234 pub fn transmit_fifo_error(&mut self) -> TRANSMIT_FIFO_ERROR_W<6> {
235 TRANSMIT_FIFO_ERROR_W::new(self)
236 }
237 #[doc = "Bit 7 - Receive FIFO overflow or underflow interrupt enable"]
238 #[inline(always)]
239 #[must_use]
240 pub fn receive_fifo_error(&mut self) -> RECEIVE_FIFO_ERROR_W<7> {
241 RECEIVE_FIFO_ERROR_W::new(self)
242 }
243 #[doc = "Bit 8 - Receive LIN mode synchronization field error interrupt enable"]
244 #[inline(always)]
245 #[must_use]
246 pub fn receive_sync_error(&mut self) -> RECEIVE_SYNC_ERROR_W<8> {
247 RECEIVE_SYNC_ERROR_W::new(self)
248 }
249 #[doc = "Bit 9 - Receive byte count reached interrupt enable"]
250 #[inline(always)]
251 #[must_use]
252 pub fn receive_byte_count(&mut self) -> RECEIVE_BYTE_COUNT_W<9> {
253 RECEIVE_BYTE_COUNT_W::new(self)
254 }
255 #[doc = "Bit 10 - Receive auto baudrate detection finished using start bit interrupt enable"]
256 #[inline(always)]
257 #[must_use]
258 pub fn auto_baudrate_start_bit(&mut self) -> AUTO_BAUDRATE_START_BIT_W<10> {
259 AUTO_BAUDRATE_START_BIT_W::new(self)
260 }
261 #[doc = "Bit 11 - Receive auto baudrate detection finished using 0x55 interrupt enable"]
262 #[inline(always)]
263 #[must_use]
264 pub fn auto_baudrate_five_five(&mut self) -> AUTO_BAUDRATE_FIVE_FIVE_W<11> {
265 AUTO_BAUDRATE_FIVE_FIVE_W::new(self)
266 }
267 #[doc = "Writes raw bits to the register."]
268 #[inline(always)]
269 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
270 self.0.bits(bits);
271 self
272 }
273}
274#[doc = "Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_enable](index.html) module"]
275pub struct INTERRUPT_ENABLE_SPEC;
276impl crate::RegisterSpec for INTERRUPT_ENABLE_SPEC {
277 type Ux = u32;
278}
279#[doc = "`read()` method returns [interrupt_enable::R](R) reader structure"]
280impl crate::Readable for INTERRUPT_ENABLE_SPEC {
281 type Reader = R;
282}
283#[doc = "`write(|w| ..)` method takes [interrupt_enable::W](W) writer structure"]
284impl crate::Writable for INTERRUPT_ENABLE_SPEC {
285 type Writer = W;
286 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
287 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
288}
289#[doc = "`reset()` method sets interrupt_enable to value 0xff"]
290impl crate::Resettable for INTERRUPT_ENABLE_SPEC {
291 const RESET_VALUE: Self::Ux = 0xff;
292}