bl602_pac/uart/
urx_config.rs

1#[doc = "Register `urx_config` reader"]
2pub struct R(crate::R<URX_CONFIG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<URX_CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<URX_CONFIG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<URX_CONFIG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `urx_config` writer"]
17pub struct W(crate::W<URX_CONFIG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<URX_CONFIG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<URX_CONFIG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<URX_CONFIG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `cr_urx_en` reader - "]
38pub type CR_URX_EN_R = crate::BitReader<bool>;
39#[doc = "Field `cr_urx_en` writer - "]
40pub type CR_URX_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
41#[doc = "Field `cr_urx_rts_sw_mode` reader - "]
42pub type CR_URX_RTS_SW_MODE_R = crate::BitReader<bool>;
43#[doc = "Field `cr_urx_rts_sw_mode` writer - "]
44pub type CR_URX_RTS_SW_MODE_W<'a, const O: u8> =
45    crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
46#[doc = "Field `cr_urx_rts_sw_val` reader - "]
47pub type CR_URX_RTS_SW_VAL_R = crate::BitReader<bool>;
48#[doc = "Field `cr_urx_rts_sw_val` writer - "]
49pub type CR_URX_RTS_SW_VAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
50#[doc = "Field `cr_urx_abr_en` reader - "]
51pub type CR_URX_ABR_EN_R = crate::BitReader<bool>;
52#[doc = "Field `cr_urx_abr_en` writer - "]
53pub type CR_URX_ABR_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
54#[doc = "Field `cr_urx_prt_en` reader - "]
55pub type CR_URX_PRT_EN_R = crate::BitReader<bool>;
56#[doc = "Field `cr_urx_prt_en` writer - "]
57pub type CR_URX_PRT_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
58#[doc = "Field `cr_urx_prt_sel` reader - "]
59pub type CR_URX_PRT_SEL_R = crate::BitReader<bool>;
60#[doc = "Field `cr_urx_prt_sel` writer - "]
61pub type CR_URX_PRT_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
62#[doc = "Field `cr_urx_ir_en` reader - "]
63pub type CR_URX_IR_EN_R = crate::BitReader<bool>;
64#[doc = "Field `cr_urx_ir_en` writer - "]
65pub type CR_URX_IR_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
66#[doc = "Field `cr_urx_ir_inv` reader - "]
67pub type CR_URX_IR_INV_R = crate::BitReader<bool>;
68#[doc = "Field `cr_urx_ir_inv` writer - "]
69pub type CR_URX_IR_INV_W<'a, const O: u8> = crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
70#[doc = "Field `cr_urx_bit_cnt_d` reader - "]
71pub type CR_URX_BIT_CNT_D_R = crate::FieldReader<u8, u8>;
72#[doc = "Field `cr_urx_bit_cnt_d` writer - "]
73pub type CR_URX_BIT_CNT_D_W<'a, const O: u8> =
74    crate::FieldWriter<'a, u32, URX_CONFIG_SPEC, u8, u8, 3, O>;
75#[doc = "Field `cr_urx_deg_en` reader - "]
76pub type CR_URX_DEG_EN_R = crate::BitReader<bool>;
77#[doc = "Field `cr_urx_deg_en` writer - "]
78pub type CR_URX_DEG_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, URX_CONFIG_SPEC, bool, O>;
79#[doc = "Field `cr_urx_deg_cnt` reader - "]
80pub type CR_URX_DEG_CNT_R = crate::FieldReader<u8, u8>;
81#[doc = "Field `cr_urx_deg_cnt` writer - "]
82pub type CR_URX_DEG_CNT_W<'a, const O: u8> =
83    crate::FieldWriter<'a, u32, URX_CONFIG_SPEC, u8, u8, 4, O>;
84#[doc = "Field `cr_urx_len` reader - "]
85pub type CR_URX_LEN_R = crate::FieldReader<u16, u16>;
86#[doc = "Field `cr_urx_len` writer - "]
87pub type CR_URX_LEN_W<'a, const O: u8> =
88    crate::FieldWriter<'a, u32, URX_CONFIG_SPEC, u16, u16, 16, O>;
89impl R {
90    #[doc = "Bit 0"]
91    #[inline(always)]
92    pub fn cr_urx_en(&self) -> CR_URX_EN_R {
93        CR_URX_EN_R::new((self.bits & 1) != 0)
94    }
95    #[doc = "Bit 1"]
96    #[inline(always)]
97    pub fn cr_urx_rts_sw_mode(&self) -> CR_URX_RTS_SW_MODE_R {
98        CR_URX_RTS_SW_MODE_R::new(((self.bits >> 1) & 1) != 0)
99    }
100    #[doc = "Bit 2"]
101    #[inline(always)]
102    pub fn cr_urx_rts_sw_val(&self) -> CR_URX_RTS_SW_VAL_R {
103        CR_URX_RTS_SW_VAL_R::new(((self.bits >> 2) & 1) != 0)
104    }
105    #[doc = "Bit 3"]
106    #[inline(always)]
107    pub fn cr_urx_abr_en(&self) -> CR_URX_ABR_EN_R {
108        CR_URX_ABR_EN_R::new(((self.bits >> 3) & 1) != 0)
109    }
110    #[doc = "Bit 4"]
111    #[inline(always)]
112    pub fn cr_urx_prt_en(&self) -> CR_URX_PRT_EN_R {
113        CR_URX_PRT_EN_R::new(((self.bits >> 4) & 1) != 0)
114    }
115    #[doc = "Bit 5"]
116    #[inline(always)]
117    pub fn cr_urx_prt_sel(&self) -> CR_URX_PRT_SEL_R {
118        CR_URX_PRT_SEL_R::new(((self.bits >> 5) & 1) != 0)
119    }
120    #[doc = "Bit 6"]
121    #[inline(always)]
122    pub fn cr_urx_ir_en(&self) -> CR_URX_IR_EN_R {
123        CR_URX_IR_EN_R::new(((self.bits >> 6) & 1) != 0)
124    }
125    #[doc = "Bit 7"]
126    #[inline(always)]
127    pub fn cr_urx_ir_inv(&self) -> CR_URX_IR_INV_R {
128        CR_URX_IR_INV_R::new(((self.bits >> 7) & 1) != 0)
129    }
130    #[doc = "Bits 8:10"]
131    #[inline(always)]
132    pub fn cr_urx_bit_cnt_d(&self) -> CR_URX_BIT_CNT_D_R {
133        CR_URX_BIT_CNT_D_R::new(((self.bits >> 8) & 7) as u8)
134    }
135    #[doc = "Bit 11"]
136    #[inline(always)]
137    pub fn cr_urx_deg_en(&self) -> CR_URX_DEG_EN_R {
138        CR_URX_DEG_EN_R::new(((self.bits >> 11) & 1) != 0)
139    }
140    #[doc = "Bits 12:15"]
141    #[inline(always)]
142    pub fn cr_urx_deg_cnt(&self) -> CR_URX_DEG_CNT_R {
143        CR_URX_DEG_CNT_R::new(((self.bits >> 12) & 0x0f) as u8)
144    }
145    #[doc = "Bits 16:31"]
146    #[inline(always)]
147    pub fn cr_urx_len(&self) -> CR_URX_LEN_R {
148        CR_URX_LEN_R::new(((self.bits >> 16) & 0xffff) as u16)
149    }
150}
151impl W {
152    #[doc = "Bit 0"]
153    #[inline(always)]
154    #[must_use]
155    pub fn cr_urx_en(&mut self) -> CR_URX_EN_W<0> {
156        CR_URX_EN_W::new(self)
157    }
158    #[doc = "Bit 1"]
159    #[inline(always)]
160    #[must_use]
161    pub fn cr_urx_rts_sw_mode(&mut self) -> CR_URX_RTS_SW_MODE_W<1> {
162        CR_URX_RTS_SW_MODE_W::new(self)
163    }
164    #[doc = "Bit 2"]
165    #[inline(always)]
166    #[must_use]
167    pub fn cr_urx_rts_sw_val(&mut self) -> CR_URX_RTS_SW_VAL_W<2> {
168        CR_URX_RTS_SW_VAL_W::new(self)
169    }
170    #[doc = "Bit 3"]
171    #[inline(always)]
172    #[must_use]
173    pub fn cr_urx_abr_en(&mut self) -> CR_URX_ABR_EN_W<3> {
174        CR_URX_ABR_EN_W::new(self)
175    }
176    #[doc = "Bit 4"]
177    #[inline(always)]
178    #[must_use]
179    pub fn cr_urx_prt_en(&mut self) -> CR_URX_PRT_EN_W<4> {
180        CR_URX_PRT_EN_W::new(self)
181    }
182    #[doc = "Bit 5"]
183    #[inline(always)]
184    #[must_use]
185    pub fn cr_urx_prt_sel(&mut self) -> CR_URX_PRT_SEL_W<5> {
186        CR_URX_PRT_SEL_W::new(self)
187    }
188    #[doc = "Bit 6"]
189    #[inline(always)]
190    #[must_use]
191    pub fn cr_urx_ir_en(&mut self) -> CR_URX_IR_EN_W<6> {
192        CR_URX_IR_EN_W::new(self)
193    }
194    #[doc = "Bit 7"]
195    #[inline(always)]
196    #[must_use]
197    pub fn cr_urx_ir_inv(&mut self) -> CR_URX_IR_INV_W<7> {
198        CR_URX_IR_INV_W::new(self)
199    }
200    #[doc = "Bits 8:10"]
201    #[inline(always)]
202    #[must_use]
203    pub fn cr_urx_bit_cnt_d(&mut self) -> CR_URX_BIT_CNT_D_W<8> {
204        CR_URX_BIT_CNT_D_W::new(self)
205    }
206    #[doc = "Bit 11"]
207    #[inline(always)]
208    #[must_use]
209    pub fn cr_urx_deg_en(&mut self) -> CR_URX_DEG_EN_W<11> {
210        CR_URX_DEG_EN_W::new(self)
211    }
212    #[doc = "Bits 12:15"]
213    #[inline(always)]
214    #[must_use]
215    pub fn cr_urx_deg_cnt(&mut self) -> CR_URX_DEG_CNT_W<12> {
216        CR_URX_DEG_CNT_W::new(self)
217    }
218    #[doc = "Bits 16:31"]
219    #[inline(always)]
220    #[must_use]
221    pub fn cr_urx_len(&mut self) -> CR_URX_LEN_W<16> {
222        CR_URX_LEN_W::new(self)
223    }
224    #[doc = "Writes raw bits to the register."]
225    #[inline(always)]
226    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
227        self.0.bits(bits);
228        self
229    }
230}
231#[doc = "urx_config.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [urx_config](index.html) module"]
232pub struct URX_CONFIG_SPEC;
233impl crate::RegisterSpec for URX_CONFIG_SPEC {
234    type Ux = u32;
235}
236#[doc = "`read()` method returns [urx_config::R](R) reader structure"]
237impl crate::Readable for URX_CONFIG_SPEC {
238    type Reader = R;
239}
240#[doc = "`write(|w| ..)` method takes [urx_config::W](W) writer structure"]
241impl crate::Writable for URX_CONFIG_SPEC {
242    type Writer = W;
243    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
244    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
245}
246#[doc = "`reset()` method sets urx_config to value 0x0700"]
247impl crate::Resettable for URX_CONFIG_SPEC {
248    const RESET_VALUE: Self::Ux = 0x0700;
249}