1#[doc = "Register `spi_int_sts` reader"]
2pub struct R(crate::R<SPI_INT_STS_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SPI_INT_STS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SPI_INT_STS_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SPI_INT_STS_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `spi_int_sts` writer"]
17pub struct W(crate::W<SPI_INT_STS_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SPI_INT_STS_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SPI_INT_STS_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SPI_INT_STS_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `spi_end_int` reader - "]
38pub type SPI_END_INT_R = crate::BitReader<bool>;
39#[doc = "Field `spi_txf_int` reader - "]
40pub type SPI_TXF_INT_R = crate::BitReader<bool>;
41#[doc = "Field `spi_rxf_int` reader - "]
42pub type SPI_RXF_INT_R = crate::BitReader<bool>;
43#[doc = "Field `spi_sto_int` reader - "]
44pub type SPI_STO_INT_R = crate::BitReader<bool>;
45#[doc = "Field `spi_txu_int` reader - "]
46pub type SPI_TXU_INT_R = crate::BitReader<bool>;
47#[doc = "Field `spi_fer_int` reader - "]
48pub type SPI_FER_INT_R = crate::BitReader<bool>;
49#[doc = "Field `cr_spi_end_mask` reader - "]
50pub type CR_SPI_END_MASK_R = crate::BitReader<bool>;
51#[doc = "Field `cr_spi_end_mask` writer - "]
52pub type CR_SPI_END_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
53#[doc = "Field `cr_spi_txf_mask` reader - "]
54pub type CR_SPI_TXF_MASK_R = crate::BitReader<bool>;
55#[doc = "Field `cr_spi_txf_mask` writer - "]
56pub type CR_SPI_TXF_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
57#[doc = "Field `cr_spi_rxf_mask` reader - "]
58pub type CR_SPI_RXF_MASK_R = crate::BitReader<bool>;
59#[doc = "Field `cr_spi_rxf_mask` writer - "]
60pub type CR_SPI_RXF_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
61#[doc = "Field `cr_spi_sto_mask` reader - "]
62pub type CR_SPI_STO_MASK_R = crate::BitReader<bool>;
63#[doc = "Field `cr_spi_sto_mask` writer - "]
64pub type CR_SPI_STO_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
65#[doc = "Field `cr_spi_txu_mask` reader - "]
66pub type CR_SPI_TXU_MASK_R = crate::BitReader<bool>;
67#[doc = "Field `cr_spi_txu_mask` writer - "]
68pub type CR_SPI_TXU_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
69#[doc = "Field `cr_spi_fer_mask` reader - "]
70pub type CR_SPI_FER_MASK_R = crate::BitReader<bool>;
71#[doc = "Field `cr_spi_fer_mask` writer - "]
72pub type CR_SPI_FER_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
73#[doc = "Field `cr_spi_end_clr` reader - "]
74pub type CR_SPI_END_CLR_R = crate::BitReader<bool>;
75#[doc = "Field `cr_spi_end_clr` writer - "]
76pub type CR_SPI_END_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
77#[doc = "Field `rsvd_17` reader - "]
78pub type RSVD_17_R = crate::BitReader<bool>;
79#[doc = "Field `rsvd_17` writer - "]
80pub type RSVD_17_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
81#[doc = "Field `rsvd_18` reader - "]
82pub type RSVD_18_R = crate::BitReader<bool>;
83#[doc = "Field `rsvd_18` writer - "]
84pub type RSVD_18_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
85#[doc = "Field `cr_spi_sto_clr` reader - "]
86pub type CR_SPI_STO_CLR_R = crate::BitReader<bool>;
87#[doc = "Field `cr_spi_sto_clr` writer - "]
88pub type CR_SPI_STO_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
89#[doc = "Field `cr_spi_txu_clr` reader - "]
90pub type CR_SPI_TXU_CLR_R = crate::BitReader<bool>;
91#[doc = "Field `cr_spi_txu_clr` writer - "]
92pub type CR_SPI_TXU_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
93#[doc = "Field `rsvd_21` reader - "]
94pub type RSVD_21_R = crate::BitReader<bool>;
95#[doc = "Field `rsvd_21` writer - "]
96pub type RSVD_21_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
97#[doc = "Field `cr_spi_end_en` reader - "]
98pub type CR_SPI_END_EN_R = crate::BitReader<bool>;
99#[doc = "Field `cr_spi_end_en` writer - "]
100pub type CR_SPI_END_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
101#[doc = "Field `cr_spi_txf_en` reader - "]
102pub type CR_SPI_TXF_EN_R = crate::BitReader<bool>;
103#[doc = "Field `cr_spi_txf_en` writer - "]
104pub type CR_SPI_TXF_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
105#[doc = "Field `cr_spi_rxf_en` reader - "]
106pub type CR_SPI_RXF_EN_R = crate::BitReader<bool>;
107#[doc = "Field `cr_spi_rxf_en` writer - "]
108pub type CR_SPI_RXF_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
109#[doc = "Field `cr_spi_sto_en` reader - "]
110pub type CR_SPI_STO_EN_R = crate::BitReader<bool>;
111#[doc = "Field `cr_spi_sto_en` writer - "]
112pub type CR_SPI_STO_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
113#[doc = "Field `cr_spi_txu_en` reader - "]
114pub type CR_SPI_TXU_EN_R = crate::BitReader<bool>;
115#[doc = "Field `cr_spi_txu_en` writer - "]
116pub type CR_SPI_TXU_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
117#[doc = "Field `cr_spi_fer_en` reader - "]
118pub type CR_SPI_FER_EN_R = crate::BitReader<bool>;
119#[doc = "Field `cr_spi_fer_en` writer - "]
120pub type CR_SPI_FER_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SPI_INT_STS_SPEC, bool, O>;
121impl R {
122 #[doc = "Bit 0"]
123 #[inline(always)]
124 pub fn spi_end_int(&self) -> SPI_END_INT_R {
125 SPI_END_INT_R::new((self.bits & 1) != 0)
126 }
127 #[doc = "Bit 1"]
128 #[inline(always)]
129 pub fn spi_txf_int(&self) -> SPI_TXF_INT_R {
130 SPI_TXF_INT_R::new(((self.bits >> 1) & 1) != 0)
131 }
132 #[doc = "Bit 2"]
133 #[inline(always)]
134 pub fn spi_rxf_int(&self) -> SPI_RXF_INT_R {
135 SPI_RXF_INT_R::new(((self.bits >> 2) & 1) != 0)
136 }
137 #[doc = "Bit 3"]
138 #[inline(always)]
139 pub fn spi_sto_int(&self) -> SPI_STO_INT_R {
140 SPI_STO_INT_R::new(((self.bits >> 3) & 1) != 0)
141 }
142 #[doc = "Bit 4"]
143 #[inline(always)]
144 pub fn spi_txu_int(&self) -> SPI_TXU_INT_R {
145 SPI_TXU_INT_R::new(((self.bits >> 4) & 1) != 0)
146 }
147 #[doc = "Bit 5"]
148 #[inline(always)]
149 pub fn spi_fer_int(&self) -> SPI_FER_INT_R {
150 SPI_FER_INT_R::new(((self.bits >> 5) & 1) != 0)
151 }
152 #[doc = "Bit 8"]
153 #[inline(always)]
154 pub fn cr_spi_end_mask(&self) -> CR_SPI_END_MASK_R {
155 CR_SPI_END_MASK_R::new(((self.bits >> 8) & 1) != 0)
156 }
157 #[doc = "Bit 9"]
158 #[inline(always)]
159 pub fn cr_spi_txf_mask(&self) -> CR_SPI_TXF_MASK_R {
160 CR_SPI_TXF_MASK_R::new(((self.bits >> 9) & 1) != 0)
161 }
162 #[doc = "Bit 10"]
163 #[inline(always)]
164 pub fn cr_spi_rxf_mask(&self) -> CR_SPI_RXF_MASK_R {
165 CR_SPI_RXF_MASK_R::new(((self.bits >> 10) & 1) != 0)
166 }
167 #[doc = "Bit 11"]
168 #[inline(always)]
169 pub fn cr_spi_sto_mask(&self) -> CR_SPI_STO_MASK_R {
170 CR_SPI_STO_MASK_R::new(((self.bits >> 11) & 1) != 0)
171 }
172 #[doc = "Bit 12"]
173 #[inline(always)]
174 pub fn cr_spi_txu_mask(&self) -> CR_SPI_TXU_MASK_R {
175 CR_SPI_TXU_MASK_R::new(((self.bits >> 12) & 1) != 0)
176 }
177 #[doc = "Bit 13"]
178 #[inline(always)]
179 pub fn cr_spi_fer_mask(&self) -> CR_SPI_FER_MASK_R {
180 CR_SPI_FER_MASK_R::new(((self.bits >> 13) & 1) != 0)
181 }
182 #[doc = "Bit 16"]
183 #[inline(always)]
184 pub fn cr_spi_end_clr(&self) -> CR_SPI_END_CLR_R {
185 CR_SPI_END_CLR_R::new(((self.bits >> 16) & 1) != 0)
186 }
187 #[doc = "Bit 17"]
188 #[inline(always)]
189 pub fn rsvd_17(&self) -> RSVD_17_R {
190 RSVD_17_R::new(((self.bits >> 17) & 1) != 0)
191 }
192 #[doc = "Bit 18"]
193 #[inline(always)]
194 pub fn rsvd_18(&self) -> RSVD_18_R {
195 RSVD_18_R::new(((self.bits >> 18) & 1) != 0)
196 }
197 #[doc = "Bit 19"]
198 #[inline(always)]
199 pub fn cr_spi_sto_clr(&self) -> CR_SPI_STO_CLR_R {
200 CR_SPI_STO_CLR_R::new(((self.bits >> 19) & 1) != 0)
201 }
202 #[doc = "Bit 20"]
203 #[inline(always)]
204 pub fn cr_spi_txu_clr(&self) -> CR_SPI_TXU_CLR_R {
205 CR_SPI_TXU_CLR_R::new(((self.bits >> 20) & 1) != 0)
206 }
207 #[doc = "Bit 21"]
208 #[inline(always)]
209 pub fn rsvd_21(&self) -> RSVD_21_R {
210 RSVD_21_R::new(((self.bits >> 21) & 1) != 0)
211 }
212 #[doc = "Bit 24"]
213 #[inline(always)]
214 pub fn cr_spi_end_en(&self) -> CR_SPI_END_EN_R {
215 CR_SPI_END_EN_R::new(((self.bits >> 24) & 1) != 0)
216 }
217 #[doc = "Bit 25"]
218 #[inline(always)]
219 pub fn cr_spi_txf_en(&self) -> CR_SPI_TXF_EN_R {
220 CR_SPI_TXF_EN_R::new(((self.bits >> 25) & 1) != 0)
221 }
222 #[doc = "Bit 26"]
223 #[inline(always)]
224 pub fn cr_spi_rxf_en(&self) -> CR_SPI_RXF_EN_R {
225 CR_SPI_RXF_EN_R::new(((self.bits >> 26) & 1) != 0)
226 }
227 #[doc = "Bit 27"]
228 #[inline(always)]
229 pub fn cr_spi_sto_en(&self) -> CR_SPI_STO_EN_R {
230 CR_SPI_STO_EN_R::new(((self.bits >> 27) & 1) != 0)
231 }
232 #[doc = "Bit 28"]
233 #[inline(always)]
234 pub fn cr_spi_txu_en(&self) -> CR_SPI_TXU_EN_R {
235 CR_SPI_TXU_EN_R::new(((self.bits >> 28) & 1) != 0)
236 }
237 #[doc = "Bit 29"]
238 #[inline(always)]
239 pub fn cr_spi_fer_en(&self) -> CR_SPI_FER_EN_R {
240 CR_SPI_FER_EN_R::new(((self.bits >> 29) & 1) != 0)
241 }
242}
243impl W {
244 #[doc = "Bit 8"]
245 #[inline(always)]
246 #[must_use]
247 pub fn cr_spi_end_mask(&mut self) -> CR_SPI_END_MASK_W<8> {
248 CR_SPI_END_MASK_W::new(self)
249 }
250 #[doc = "Bit 9"]
251 #[inline(always)]
252 #[must_use]
253 pub fn cr_spi_txf_mask(&mut self) -> CR_SPI_TXF_MASK_W<9> {
254 CR_SPI_TXF_MASK_W::new(self)
255 }
256 #[doc = "Bit 10"]
257 #[inline(always)]
258 #[must_use]
259 pub fn cr_spi_rxf_mask(&mut self) -> CR_SPI_RXF_MASK_W<10> {
260 CR_SPI_RXF_MASK_W::new(self)
261 }
262 #[doc = "Bit 11"]
263 #[inline(always)]
264 #[must_use]
265 pub fn cr_spi_sto_mask(&mut self) -> CR_SPI_STO_MASK_W<11> {
266 CR_SPI_STO_MASK_W::new(self)
267 }
268 #[doc = "Bit 12"]
269 #[inline(always)]
270 #[must_use]
271 pub fn cr_spi_txu_mask(&mut self) -> CR_SPI_TXU_MASK_W<12> {
272 CR_SPI_TXU_MASK_W::new(self)
273 }
274 #[doc = "Bit 13"]
275 #[inline(always)]
276 #[must_use]
277 pub fn cr_spi_fer_mask(&mut self) -> CR_SPI_FER_MASK_W<13> {
278 CR_SPI_FER_MASK_W::new(self)
279 }
280 #[doc = "Bit 16"]
281 #[inline(always)]
282 #[must_use]
283 pub fn cr_spi_end_clr(&mut self) -> CR_SPI_END_CLR_W<16> {
284 CR_SPI_END_CLR_W::new(self)
285 }
286 #[doc = "Bit 17"]
287 #[inline(always)]
288 #[must_use]
289 pub fn rsvd_17(&mut self) -> RSVD_17_W<17> {
290 RSVD_17_W::new(self)
291 }
292 #[doc = "Bit 18"]
293 #[inline(always)]
294 #[must_use]
295 pub fn rsvd_18(&mut self) -> RSVD_18_W<18> {
296 RSVD_18_W::new(self)
297 }
298 #[doc = "Bit 19"]
299 #[inline(always)]
300 #[must_use]
301 pub fn cr_spi_sto_clr(&mut self) -> CR_SPI_STO_CLR_W<19> {
302 CR_SPI_STO_CLR_W::new(self)
303 }
304 #[doc = "Bit 20"]
305 #[inline(always)]
306 #[must_use]
307 pub fn cr_spi_txu_clr(&mut self) -> CR_SPI_TXU_CLR_W<20> {
308 CR_SPI_TXU_CLR_W::new(self)
309 }
310 #[doc = "Bit 21"]
311 #[inline(always)]
312 #[must_use]
313 pub fn rsvd_21(&mut self) -> RSVD_21_W<21> {
314 RSVD_21_W::new(self)
315 }
316 #[doc = "Bit 24"]
317 #[inline(always)]
318 #[must_use]
319 pub fn cr_spi_end_en(&mut self) -> CR_SPI_END_EN_W<24> {
320 CR_SPI_END_EN_W::new(self)
321 }
322 #[doc = "Bit 25"]
323 #[inline(always)]
324 #[must_use]
325 pub fn cr_spi_txf_en(&mut self) -> CR_SPI_TXF_EN_W<25> {
326 CR_SPI_TXF_EN_W::new(self)
327 }
328 #[doc = "Bit 26"]
329 #[inline(always)]
330 #[must_use]
331 pub fn cr_spi_rxf_en(&mut self) -> CR_SPI_RXF_EN_W<26> {
332 CR_SPI_RXF_EN_W::new(self)
333 }
334 #[doc = "Bit 27"]
335 #[inline(always)]
336 #[must_use]
337 pub fn cr_spi_sto_en(&mut self) -> CR_SPI_STO_EN_W<27> {
338 CR_SPI_STO_EN_W::new(self)
339 }
340 #[doc = "Bit 28"]
341 #[inline(always)]
342 #[must_use]
343 pub fn cr_spi_txu_en(&mut self) -> CR_SPI_TXU_EN_W<28> {
344 CR_SPI_TXU_EN_W::new(self)
345 }
346 #[doc = "Bit 29"]
347 #[inline(always)]
348 #[must_use]
349 pub fn cr_spi_fer_en(&mut self) -> CR_SPI_FER_EN_W<29> {
350 CR_SPI_FER_EN_W::new(self)
351 }
352 #[doc = "Writes raw bits to the register."]
353 #[inline(always)]
354 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
355 self.0.bits(bits);
356 self
357 }
358}
359#[doc = "spi_int_sts.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_int_sts](index.html) module"]
360pub struct SPI_INT_STS_SPEC;
361impl crate::RegisterSpec for SPI_INT_STS_SPEC {
362 type Ux = u32;
363}
364#[doc = "`read()` method returns [spi_int_sts::R](R) reader structure"]
365impl crate::Readable for SPI_INT_STS_SPEC {
366 type Reader = R;
367}
368#[doc = "`write(|w| ..)` method takes [spi_int_sts::W](W) writer structure"]
369impl crate::Writable for SPI_INT_STS_SPEC {
370 type Writer = W;
371 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
372 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
373}
374#[doc = "`reset()` method sets spi_int_sts to value 0x3f00_3f00"]
375impl crate::Resettable for SPI_INT_STS_SPEC {
376 const RESET_VALUE: Self::Ux = 0x3f00_3f00;
377}