bl602_pac/sf_ctrl/
sf3_if_io_dly_0.rs

1#[doc = "Register `sf3_if_io_dly_0` reader"]
2pub struct R(crate::R<SF3_IF_IO_DLY_0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SF3_IF_IO_DLY_0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SF3_IF_IO_DLY_0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SF3_IF_IO_DLY_0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `sf3_if_io_dly_0` writer"]
17pub struct W(crate::W<SF3_IF_IO_DLY_0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SF3_IF_IO_DLY_0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SF3_IF_IO_DLY_0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SF3_IF_IO_DLY_0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `sf3_cs_dly_sel` reader - "]
38pub type SF3_CS_DLY_SEL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `sf3_cs_dly_sel` writer - "]
40pub type SF3_CS_DLY_SEL_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, SF3_IF_IO_DLY_0_SPEC, u8, u8, 2, O>;
42#[doc = "Field `sf3_clk_out_dly_sel` reader - "]
43pub type SF3_CLK_OUT_DLY_SEL_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `sf3_clk_out_dly_sel` writer - "]
45pub type SF3_CLK_OUT_DLY_SEL_W<'a, const O: u8> =
46    crate::FieldWriter<'a, u32, SF3_IF_IO_DLY_0_SPEC, u8, u8, 2, O>;
47#[doc = "Field `sf3_dqs_oe_dly_sel` reader - "]
48pub type SF3_DQS_OE_DLY_SEL_R = crate::FieldReader<u8, u8>;
49#[doc = "Field `sf3_dqs_oe_dly_sel` writer - "]
50pub type SF3_DQS_OE_DLY_SEL_W<'a, const O: u8> =
51    crate::FieldWriter<'a, u32, SF3_IF_IO_DLY_0_SPEC, u8, u8, 2, O>;
52#[doc = "Field `sf3_dqs_di_dly_sel` reader - "]
53pub type SF3_DQS_DI_DLY_SEL_R = crate::FieldReader<u8, u8>;
54#[doc = "Field `sf3_dqs_di_dly_sel` writer - "]
55pub type SF3_DQS_DI_DLY_SEL_W<'a, const O: u8> =
56    crate::FieldWriter<'a, u32, SF3_IF_IO_DLY_0_SPEC, u8, u8, 2, O>;
57#[doc = "Field `sf3_dqs_do_dly_sel` reader - "]
58pub type SF3_DQS_DO_DLY_SEL_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `sf3_dqs_do_dly_sel` writer - "]
60pub type SF3_DQS_DO_DLY_SEL_W<'a, const O: u8> =
61    crate::FieldWriter<'a, u32, SF3_IF_IO_DLY_0_SPEC, u8, u8, 2, O>;
62impl R {
63    #[doc = "Bits 0:1"]
64    #[inline(always)]
65    pub fn sf3_cs_dly_sel(&self) -> SF3_CS_DLY_SEL_R {
66        SF3_CS_DLY_SEL_R::new((self.bits & 3) as u8)
67    }
68    #[doc = "Bits 8:9"]
69    #[inline(always)]
70    pub fn sf3_clk_out_dly_sel(&self) -> SF3_CLK_OUT_DLY_SEL_R {
71        SF3_CLK_OUT_DLY_SEL_R::new(((self.bits >> 8) & 3) as u8)
72    }
73    #[doc = "Bits 26:27"]
74    #[inline(always)]
75    pub fn sf3_dqs_oe_dly_sel(&self) -> SF3_DQS_OE_DLY_SEL_R {
76        SF3_DQS_OE_DLY_SEL_R::new(((self.bits >> 26) & 3) as u8)
77    }
78    #[doc = "Bits 28:29"]
79    #[inline(always)]
80    pub fn sf3_dqs_di_dly_sel(&self) -> SF3_DQS_DI_DLY_SEL_R {
81        SF3_DQS_DI_DLY_SEL_R::new(((self.bits >> 28) & 3) as u8)
82    }
83    #[doc = "Bits 30:31"]
84    #[inline(always)]
85    pub fn sf3_dqs_do_dly_sel(&self) -> SF3_DQS_DO_DLY_SEL_R {
86        SF3_DQS_DO_DLY_SEL_R::new(((self.bits >> 30) & 3) as u8)
87    }
88}
89impl W {
90    #[doc = "Bits 0:1"]
91    #[inline(always)]
92    #[must_use]
93    pub fn sf3_cs_dly_sel(&mut self) -> SF3_CS_DLY_SEL_W<0> {
94        SF3_CS_DLY_SEL_W::new(self)
95    }
96    #[doc = "Bits 8:9"]
97    #[inline(always)]
98    #[must_use]
99    pub fn sf3_clk_out_dly_sel(&mut self) -> SF3_CLK_OUT_DLY_SEL_W<8> {
100        SF3_CLK_OUT_DLY_SEL_W::new(self)
101    }
102    #[doc = "Bits 26:27"]
103    #[inline(always)]
104    #[must_use]
105    pub fn sf3_dqs_oe_dly_sel(&mut self) -> SF3_DQS_OE_DLY_SEL_W<26> {
106        SF3_DQS_OE_DLY_SEL_W::new(self)
107    }
108    #[doc = "Bits 28:29"]
109    #[inline(always)]
110    #[must_use]
111    pub fn sf3_dqs_di_dly_sel(&mut self) -> SF3_DQS_DI_DLY_SEL_W<28> {
112        SF3_DQS_DI_DLY_SEL_W::new(self)
113    }
114    #[doc = "Bits 30:31"]
115    #[inline(always)]
116    #[must_use]
117    pub fn sf3_dqs_do_dly_sel(&mut self) -> SF3_DQS_DO_DLY_SEL_W<30> {
118        SF3_DQS_DO_DLY_SEL_W::new(self)
119    }
120    #[doc = "Writes raw bits to the register."]
121    #[inline(always)]
122    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
123        self.0.bits(bits);
124        self
125    }
126}
127#[doc = "sf3_if_io_dly_0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sf3_if_io_dly_0](index.html) module"]
128pub struct SF3_IF_IO_DLY_0_SPEC;
129impl crate::RegisterSpec for SF3_IF_IO_DLY_0_SPEC {
130    type Ux = u32;
131}
132#[doc = "`read()` method returns [sf3_if_io_dly_0::R](R) reader structure"]
133impl crate::Readable for SF3_IF_IO_DLY_0_SPEC {
134    type Reader = R;
135}
136#[doc = "`write(|w| ..)` method takes [sf3_if_io_dly_0::W](W) writer structure"]
137impl crate::Writable for SF3_IF_IO_DLY_0_SPEC {
138    type Writer = W;
139    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
140    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
141}
142#[doc = "`reset()` method sets sf3_if_io_dly_0 to value 0"]
143impl crate::Resettable for SF3_IF_IO_DLY_0_SPEC {
144    const RESET_VALUE: Self::Ux = 0;
145}
bl602_pac/sf_ctrl/sf3_if_io_dly_0.rs

bl602_pac/sf_ctrl/
sf3_if_io_dly_0.rs
