bl602_pac/sec_eng/
se_aes_0_ctrl.rs

1#[doc = "Register `se_aes_0_ctrl` reader"]
2pub struct R(crate::R<SE_AES_0_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SE_AES_0_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SE_AES_0_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SE_AES_0_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `se_aes_0_ctrl` writer"]
17pub struct W(crate::W<SE_AES_0_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SE_AES_0_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SE_AES_0_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SE_AES_0_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `se_aes_0_busy` reader - "]
38pub type SE_AES_0_BUSY_R = crate::BitReader<bool>;
39#[doc = "Field `se_aes_0_trig_1t` reader - "]
40pub type SE_AES_0_TRIG_1T_R = crate::BitReader<bool>;
41#[doc = "Field `se_aes_0_trig_1t` writer - "]
42pub type SE_AES_0_TRIG_1T_W<'a, const O: u8> =
43    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
44#[doc = "Field `se_aes_0_en` reader - "]
45pub type SE_AES_0_EN_R = crate::BitReader<bool>;
46#[doc = "Field `se_aes_0_en` writer - "]
47pub type SE_AES_0_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
48#[doc = "Field `se_aes_0_mode` reader - "]
49pub type SE_AES_0_MODE_R = crate::FieldReader<u8, u8>;
50#[doc = "Field `se_aes_0_mode` writer - "]
51pub type SE_AES_0_MODE_W<'a, const O: u8> =
52    crate::FieldWriter<'a, u32, SE_AES_0_CTRL_SPEC, u8, u8, 2, O>;
53#[doc = "Field `se_aes_0_dec_en` reader - "]
54pub type SE_AES_0_DEC_EN_R = crate::BitReader<bool>;
55#[doc = "Field `se_aes_0_dec_en` writer - "]
56pub type SE_AES_0_DEC_EN_W<'a, const O: u8> =
57    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
58#[doc = "Field `se_aes_0_dec_key_sel` reader - "]
59pub type SE_AES_0_DEC_KEY_SEL_R = crate::BitReader<bool>;
60#[doc = "Field `se_aes_0_dec_key_sel` writer - "]
61pub type SE_AES_0_DEC_KEY_SEL_W<'a, const O: u8> =
62    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
63#[doc = "Field `se_aes_0_hw_key_en` reader - "]
64pub type SE_AES_0_HW_KEY_EN_R = crate::BitReader<bool>;
65#[doc = "Field `se_aes_0_hw_key_en` writer - "]
66pub type SE_AES_0_HW_KEY_EN_W<'a, const O: u8> =
67    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
68#[doc = "Field `se_aes_0_int` reader - "]
69pub type SE_AES_0_INT_R = crate::BitReader<bool>;
70#[doc = "Field `se_aes_0_int_clr_1t` reader - "]
71pub type SE_AES_0_INT_CLR_1T_R = crate::BitReader<bool>;
72#[doc = "Field `se_aes_0_int_clr_1t` writer - "]
73pub type SE_AES_0_INT_CLR_1T_W<'a, const O: u8> =
74    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
75#[doc = "Field `se_aes_0_int_set_1t` reader - "]
76pub type SE_AES_0_INT_SET_1T_R = crate::BitReader<bool>;
77#[doc = "Field `se_aes_0_int_set_1t` writer - "]
78pub type SE_AES_0_INT_SET_1T_W<'a, const O: u8> =
79    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
80#[doc = "Field `se_aes_0_int_mask` reader - "]
81pub type SE_AES_0_INT_MASK_R = crate::BitReader<bool>;
82#[doc = "Field `se_aes_0_int_mask` writer - "]
83pub type SE_AES_0_INT_MASK_W<'a, const O: u8> =
84    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
85#[doc = "Field `se_aes_0_block_mode` reader - "]
86pub type SE_AES_0_BLOCK_MODE_R = crate::FieldReader<u8, u8>;
87#[doc = "Field `se_aes_0_block_mode` writer - "]
88pub type SE_AES_0_BLOCK_MODE_W<'a, const O: u8> =
89    crate::FieldWriter<'a, u32, SE_AES_0_CTRL_SPEC, u8, u8, 2, O>;
90#[doc = "Field `se_aes_0_iv_sel` reader - "]
91pub type SE_AES_0_IV_SEL_R = crate::BitReader<bool>;
92#[doc = "Field `se_aes_0_iv_sel` writer - "]
93pub type SE_AES_0_IV_SEL_W<'a, const O: u8> =
94    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
95#[doc = "Field `se_aes_0_link_mode` reader - "]
96pub type SE_AES_0_LINK_MODE_R = crate::BitReader<bool>;
97#[doc = "Field `se_aes_0_link_mode` writer - "]
98pub type SE_AES_0_LINK_MODE_W<'a, const O: u8> =
99    crate::BitWriter<'a, u32, SE_AES_0_CTRL_SPEC, bool, O>;
100#[doc = "Field `se_aes_0_msg_len` reader - "]
101pub type SE_AES_0_MSG_LEN_R = crate::FieldReader<u16, u16>;
102#[doc = "Field `se_aes_0_msg_len` writer - "]
103pub type SE_AES_0_MSG_LEN_W<'a, const O: u8> =
104    crate::FieldWriter<'a, u32, SE_AES_0_CTRL_SPEC, u16, u16, 16, O>;
105impl R {
106    #[doc = "Bit 0"]
107    #[inline(always)]
108    pub fn se_aes_0_busy(&self) -> SE_AES_0_BUSY_R {
109        SE_AES_0_BUSY_R::new((self.bits & 1) != 0)
110    }
111    #[doc = "Bit 1"]
112    #[inline(always)]
113    pub fn se_aes_0_trig_1t(&self) -> SE_AES_0_TRIG_1T_R {
114        SE_AES_0_TRIG_1T_R::new(((self.bits >> 1) & 1) != 0)
115    }
116    #[doc = "Bit 2"]
117    #[inline(always)]
118    pub fn se_aes_0_en(&self) -> SE_AES_0_EN_R {
119        SE_AES_0_EN_R::new(((self.bits >> 2) & 1) != 0)
120    }
121    #[doc = "Bits 3:4"]
122    #[inline(always)]
123    pub fn se_aes_0_mode(&self) -> SE_AES_0_MODE_R {
124        SE_AES_0_MODE_R::new(((self.bits >> 3) & 3) as u8)
125    }
126    #[doc = "Bit 5"]
127    #[inline(always)]
128    pub fn se_aes_0_dec_en(&self) -> SE_AES_0_DEC_EN_R {
129        SE_AES_0_DEC_EN_R::new(((self.bits >> 5) & 1) != 0)
130    }
131    #[doc = "Bit 6"]
132    #[inline(always)]
133    pub fn se_aes_0_dec_key_sel(&self) -> SE_AES_0_DEC_KEY_SEL_R {
134        SE_AES_0_DEC_KEY_SEL_R::new(((self.bits >> 6) & 1) != 0)
135    }
136    #[doc = "Bit 7"]
137    #[inline(always)]
138    pub fn se_aes_0_hw_key_en(&self) -> SE_AES_0_HW_KEY_EN_R {
139        SE_AES_0_HW_KEY_EN_R::new(((self.bits >> 7) & 1) != 0)
140    }
141    #[doc = "Bit 8"]
142    #[inline(always)]
143    pub fn se_aes_0_int(&self) -> SE_AES_0_INT_R {
144        SE_AES_0_INT_R::new(((self.bits >> 8) & 1) != 0)
145    }
146    #[doc = "Bit 9"]
147    #[inline(always)]
148    pub fn se_aes_0_int_clr_1t(&self) -> SE_AES_0_INT_CLR_1T_R {
149        SE_AES_0_INT_CLR_1T_R::new(((self.bits >> 9) & 1) != 0)
150    }
151    #[doc = "Bit 10"]
152    #[inline(always)]
153    pub fn se_aes_0_int_set_1t(&self) -> SE_AES_0_INT_SET_1T_R {
154        SE_AES_0_INT_SET_1T_R::new(((self.bits >> 10) & 1) != 0)
155    }
156    #[doc = "Bit 11"]
157    #[inline(always)]
158    pub fn se_aes_0_int_mask(&self) -> SE_AES_0_INT_MASK_R {
159        SE_AES_0_INT_MASK_R::new(((self.bits >> 11) & 1) != 0)
160    }
161    #[doc = "Bits 12:13"]
162    #[inline(always)]
163    pub fn se_aes_0_block_mode(&self) -> SE_AES_0_BLOCK_MODE_R {
164        SE_AES_0_BLOCK_MODE_R::new(((self.bits >> 12) & 3) as u8)
165    }
166    #[doc = "Bit 14"]
167    #[inline(always)]
168    pub fn se_aes_0_iv_sel(&self) -> SE_AES_0_IV_SEL_R {
169        SE_AES_0_IV_SEL_R::new(((self.bits >> 14) & 1) != 0)
170    }
171    #[doc = "Bit 15"]
172    #[inline(always)]
173    pub fn se_aes_0_link_mode(&self) -> SE_AES_0_LINK_MODE_R {
174        SE_AES_0_LINK_MODE_R::new(((self.bits >> 15) & 1) != 0)
175    }
176    #[doc = "Bits 16:31"]
177    #[inline(always)]
178    pub fn se_aes_0_msg_len(&self) -> SE_AES_0_MSG_LEN_R {
179        SE_AES_0_MSG_LEN_R::new(((self.bits >> 16) & 0xffff) as u16)
180    }
181}
182impl W {
183    #[doc = "Bit 1"]
184    #[inline(always)]
185    #[must_use]
186    pub fn se_aes_0_trig_1t(&mut self) -> SE_AES_0_TRIG_1T_W<1> {
187        SE_AES_0_TRIG_1T_W::new(self)
188    }
189    #[doc = "Bit 2"]
190    #[inline(always)]
191    #[must_use]
192    pub fn se_aes_0_en(&mut self) -> SE_AES_0_EN_W<2> {
193        SE_AES_0_EN_W::new(self)
194    }
195    #[doc = "Bits 3:4"]
196    #[inline(always)]
197    #[must_use]
198    pub fn se_aes_0_mode(&mut self) -> SE_AES_0_MODE_W<3> {
199        SE_AES_0_MODE_W::new(self)
200    }
201    #[doc = "Bit 5"]
202    #[inline(always)]
203    #[must_use]
204    pub fn se_aes_0_dec_en(&mut self) -> SE_AES_0_DEC_EN_W<5> {
205        SE_AES_0_DEC_EN_W::new(self)
206    }
207    #[doc = "Bit 6"]
208    #[inline(always)]
209    #[must_use]
210    pub fn se_aes_0_dec_key_sel(&mut self) -> SE_AES_0_DEC_KEY_SEL_W<6> {
211        SE_AES_0_DEC_KEY_SEL_W::new(self)
212    }
213    #[doc = "Bit 7"]
214    #[inline(always)]
215    #[must_use]
216    pub fn se_aes_0_hw_key_en(&mut self) -> SE_AES_0_HW_KEY_EN_W<7> {
217        SE_AES_0_HW_KEY_EN_W::new(self)
218    }
219    #[doc = "Bit 9"]
220    #[inline(always)]
221    #[must_use]
222    pub fn se_aes_0_int_clr_1t(&mut self) -> SE_AES_0_INT_CLR_1T_W<9> {
223        SE_AES_0_INT_CLR_1T_W::new(self)
224    }
225    #[doc = "Bit 10"]
226    #[inline(always)]
227    #[must_use]
228    pub fn se_aes_0_int_set_1t(&mut self) -> SE_AES_0_INT_SET_1T_W<10> {
229        SE_AES_0_INT_SET_1T_W::new(self)
230    }
231    #[doc = "Bit 11"]
232    #[inline(always)]
233    #[must_use]
234    pub fn se_aes_0_int_mask(&mut self) -> SE_AES_0_INT_MASK_W<11> {
235        SE_AES_0_INT_MASK_W::new(self)
236    }
237    #[doc = "Bits 12:13"]
238    #[inline(always)]
239    #[must_use]
240    pub fn se_aes_0_block_mode(&mut self) -> SE_AES_0_BLOCK_MODE_W<12> {
241        SE_AES_0_BLOCK_MODE_W::new(self)
242    }
243    #[doc = "Bit 14"]
244    #[inline(always)]
245    #[must_use]
246    pub fn se_aes_0_iv_sel(&mut self) -> SE_AES_0_IV_SEL_W<14> {
247        SE_AES_0_IV_SEL_W::new(self)
248    }
249    #[doc = "Bit 15"]
250    #[inline(always)]
251    #[must_use]
252    pub fn se_aes_0_link_mode(&mut self) -> SE_AES_0_LINK_MODE_W<15> {
253        SE_AES_0_LINK_MODE_W::new(self)
254    }
255    #[doc = "Bits 16:31"]
256    #[inline(always)]
257    #[must_use]
258    pub fn se_aes_0_msg_len(&mut self) -> SE_AES_0_MSG_LEN_W<16> {
259        SE_AES_0_MSG_LEN_W::new(self)
260    }
261    #[doc = "Writes raw bits to the register."]
262    #[inline(always)]
263    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
264        self.0.bits(bits);
265        self
266    }
267}
268#[doc = "se_aes_0_ctrl.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [se_aes_0_ctrl](index.html) module"]
269pub struct SE_AES_0_CTRL_SPEC;
270impl crate::RegisterSpec for SE_AES_0_CTRL_SPEC {
271    type Ux = u32;
272}
273#[doc = "`read()` method returns [se_aes_0_ctrl::R](R) reader structure"]
274impl crate::Readable for SE_AES_0_CTRL_SPEC {
275    type Reader = R;
276}
277#[doc = "`write(|w| ..)` method takes [se_aes_0_ctrl::W](W) writer structure"]
278impl crate::Writable for SE_AES_0_CTRL_SPEC {
279    type Writer = W;
280    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
281    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
282}
283#[doc = "`reset()` method sets se_aes_0_ctrl to value 0"]
284impl crate::Resettable for SE_AES_0_CTRL_SPEC {
285    const RESET_VALUE: Self::Ux = 0;
286}