1#[doc = "Register `ten_dig` reader"]
2pub struct R(crate::R<TEN_DIG_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TEN_DIG_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TEN_DIG_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TEN_DIG_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ten_dig` writer"]
17pub struct W(crate::W<TEN_DIG_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TEN_DIG_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TEN_DIG_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TEN_DIG_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `dten_clkpll_postdiv_clk` reader - "]
38pub type DTEN_CLKPLL_POSTDIV_CLK_R = crate::BitReader<bool>;
39#[doc = "Field `dten_clkpll_postdiv_clk` writer - "]
40pub type DTEN_CLKPLL_POSTDIV_CLK_W<'a, const O: u8> =
41 crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
42#[doc = "Field `dten_clkpll_clk96m` reader - "]
43pub type DTEN_CLKPLL_CLK96M_R = crate::BitReader<bool>;
44#[doc = "Field `dten_clkpll_clk96m` writer - "]
45pub type DTEN_CLKPLL_CLK96M_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
46#[doc = "Field `dten_clkpll_clk32m` reader - "]
47pub type DTEN_CLKPLL_CLK32M_R = crate::BitReader<bool>;
48#[doc = "Field `dten_clkpll_clk32m` writer - "]
49pub type DTEN_CLKPLL_CLK32M_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
50#[doc = "Field `dten_clkpll_fsdm` reader - "]
51pub type DTEN_CLKPLL_FSDM_R = crate::BitReader<bool>;
52#[doc = "Field `dten_clkpll_fsdm` writer - "]
53pub type DTEN_CLKPLL_FSDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
54#[doc = "Field `dten_clkpll_fref` reader - "]
55pub type DTEN_CLKPLL_FREF_R = crate::BitReader<bool>;
56#[doc = "Field `dten_clkpll_fref` writer - "]
57pub type DTEN_CLKPLL_FREF_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
58#[doc = "Field `dten_clkpll_fin` reader - "]
59pub type DTEN_CLKPLL_FIN_R = crate::BitReader<bool>;
60#[doc = "Field `dten_clkpll_fin` writer - "]
61pub type DTEN_CLKPLL_FIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
62#[doc = "Field `dten_lo_fsdm` reader - "]
63pub type DTEN_LO_FSDM_R = crate::BitReader<bool>;
64#[doc = "Field `dten_lo_fsdm` writer - "]
65pub type DTEN_LO_FSDM_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
66#[doc = "Field `dten_lo_fref` reader - "]
67pub type DTEN_LO_FREF_R = crate::BitReader<bool>;
68#[doc = "Field `dten_lo_fref` writer - "]
69pub type DTEN_LO_FREF_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
70#[doc = "Field `dtest_pull_down` reader - "]
71pub type DTEST_PULL_DOWN_R = crate::BitReader<bool>;
72#[doc = "Field `dtest_pull_down` writer - "]
73pub type DTEST_PULL_DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
74#[doc = "Field `rf_dtest_en` reader - "]
75pub type RF_DTEST_EN_R = crate::BitReader<bool>;
76#[doc = "Field `rf_dtest_en` writer - "]
77pub type RF_DTEST_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TEN_DIG_SPEC, bool, O>;
78impl R {
79 #[doc = "Bit 0"]
80 #[inline(always)]
81 pub fn dten_clkpll_postdiv_clk(&self) -> DTEN_CLKPLL_POSTDIV_CLK_R {
82 DTEN_CLKPLL_POSTDIV_CLK_R::new((self.bits & 1) != 0)
83 }
84 #[doc = "Bit 1"]
85 #[inline(always)]
86 pub fn dten_clkpll_clk96m(&self) -> DTEN_CLKPLL_CLK96M_R {
87 DTEN_CLKPLL_CLK96M_R::new(((self.bits >> 1) & 1) != 0)
88 }
89 #[doc = "Bit 2"]
90 #[inline(always)]
91 pub fn dten_clkpll_clk32m(&self) -> DTEN_CLKPLL_CLK32M_R {
92 DTEN_CLKPLL_CLK32M_R::new(((self.bits >> 2) & 1) != 0)
93 }
94 #[doc = "Bit 3"]
95 #[inline(always)]
96 pub fn dten_clkpll_fsdm(&self) -> DTEN_CLKPLL_FSDM_R {
97 DTEN_CLKPLL_FSDM_R::new(((self.bits >> 3) & 1) != 0)
98 }
99 #[doc = "Bit 4"]
100 #[inline(always)]
101 pub fn dten_clkpll_fref(&self) -> DTEN_CLKPLL_FREF_R {
102 DTEN_CLKPLL_FREF_R::new(((self.bits >> 4) & 1) != 0)
103 }
104 #[doc = "Bit 5"]
105 #[inline(always)]
106 pub fn dten_clkpll_fin(&self) -> DTEN_CLKPLL_FIN_R {
107 DTEN_CLKPLL_FIN_R::new(((self.bits >> 5) & 1) != 0)
108 }
109 #[doc = "Bit 6"]
110 #[inline(always)]
111 pub fn dten_lo_fsdm(&self) -> DTEN_LO_FSDM_R {
112 DTEN_LO_FSDM_R::new(((self.bits >> 6) & 1) != 0)
113 }
114 #[doc = "Bit 8"]
115 #[inline(always)]
116 pub fn dten_lo_fref(&self) -> DTEN_LO_FREF_R {
117 DTEN_LO_FREF_R::new(((self.bits >> 8) & 1) != 0)
118 }
119 #[doc = "Bit 9"]
120 #[inline(always)]
121 pub fn dtest_pull_down(&self) -> DTEST_PULL_DOWN_R {
122 DTEST_PULL_DOWN_R::new(((self.bits >> 9) & 1) != 0)
123 }
124 #[doc = "Bit 23"]
125 #[inline(always)]
126 pub fn rf_dtest_en(&self) -> RF_DTEST_EN_R {
127 RF_DTEST_EN_R::new(((self.bits >> 23) & 1) != 0)
128 }
129}
130impl W {
131 #[doc = "Bit 0"]
132 #[inline(always)]
133 #[must_use]
134 pub fn dten_clkpll_postdiv_clk(&mut self) -> DTEN_CLKPLL_POSTDIV_CLK_W<0> {
135 DTEN_CLKPLL_POSTDIV_CLK_W::new(self)
136 }
137 #[doc = "Bit 1"]
138 #[inline(always)]
139 #[must_use]
140 pub fn dten_clkpll_clk96m(&mut self) -> DTEN_CLKPLL_CLK96M_W<1> {
141 DTEN_CLKPLL_CLK96M_W::new(self)
142 }
143 #[doc = "Bit 2"]
144 #[inline(always)]
145 #[must_use]
146 pub fn dten_clkpll_clk32m(&mut self) -> DTEN_CLKPLL_CLK32M_W<2> {
147 DTEN_CLKPLL_CLK32M_W::new(self)
148 }
149 #[doc = "Bit 3"]
150 #[inline(always)]
151 #[must_use]
152 pub fn dten_clkpll_fsdm(&mut self) -> DTEN_CLKPLL_FSDM_W<3> {
153 DTEN_CLKPLL_FSDM_W::new(self)
154 }
155 #[doc = "Bit 4"]
156 #[inline(always)]
157 #[must_use]
158 pub fn dten_clkpll_fref(&mut self) -> DTEN_CLKPLL_FREF_W<4> {
159 DTEN_CLKPLL_FREF_W::new(self)
160 }
161 #[doc = "Bit 5"]
162 #[inline(always)]
163 #[must_use]
164 pub fn dten_clkpll_fin(&mut self) -> DTEN_CLKPLL_FIN_W<5> {
165 DTEN_CLKPLL_FIN_W::new(self)
166 }
167 #[doc = "Bit 6"]
168 #[inline(always)]
169 #[must_use]
170 pub fn dten_lo_fsdm(&mut self) -> DTEN_LO_FSDM_W<6> {
171 DTEN_LO_FSDM_W::new(self)
172 }
173 #[doc = "Bit 8"]
174 #[inline(always)]
175 #[must_use]
176 pub fn dten_lo_fref(&mut self) -> DTEN_LO_FREF_W<8> {
177 DTEN_LO_FREF_W::new(self)
178 }
179 #[doc = "Bit 9"]
180 #[inline(always)]
181 #[must_use]
182 pub fn dtest_pull_down(&mut self) -> DTEST_PULL_DOWN_W<9> {
183 DTEST_PULL_DOWN_W::new(self)
184 }
185 #[doc = "Bit 23"]
186 #[inline(always)]
187 #[must_use]
188 pub fn rf_dtest_en(&mut self) -> RF_DTEST_EN_W<23> {
189 RF_DTEST_EN_W::new(self)
190 }
191 #[doc = "Writes raw bits to the register."]
192 #[inline(always)]
193 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
194 self.0.bits(bits);
195 self
196 }
197}
198#[doc = "digital test register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ten_dig](index.html) module"]
199pub struct TEN_DIG_SPEC;
200impl crate::RegisterSpec for TEN_DIG_SPEC {
201 type Ux = u32;
202}
203#[doc = "`read()` method returns [ten_dig::R](R) reader structure"]
204impl crate::Readable for TEN_DIG_SPEC {
205 type Reader = R;
206}
207#[doc = "`write(|w| ..)` method takes [ten_dig::W](W) writer structure"]
208impl crate::Writable for TEN_DIG_SPEC {
209 type Writer = W;
210 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
211 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
212}
213#[doc = "`reset()` method sets ten_dig to value 0"]
214impl crate::Resettable for TEN_DIG_SPEC {
215 const RESET_VALUE: Self::Ux = 0;
216}