bl602_pac/rf/
rf_base_ctrl1.rs

1#[doc = "Register `rf_base_ctrl1` reader"]
2pub struct R(crate::R<RF_BASE_CTRL1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<RF_BASE_CTRL1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<RF_BASE_CTRL1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<RF_BASE_CTRL1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `rf_base_ctrl1` writer"]
17pub struct W(crate::W<RF_BASE_CTRL1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<RF_BASE_CTRL1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<RF_BASE_CTRL1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<RF_BASE_CTRL1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `aupll_sdm_rst_dly` reader - "]
38pub type AUPLL_SDM_RST_DLY_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `aupll_sdm_rst_dly` writer - "]
40pub type AUPLL_SDM_RST_DLY_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
42#[doc = "Field `lo_sdm_rst_dly` reader - "]
43pub type LO_SDM_RST_DLY_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `lo_sdm_rst_dly` writer - "]
45pub type LO_SDM_RST_DLY_W<'a, const O: u8> =
46    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
47#[doc = "Field `ppu_lead` reader - "]
48pub type PPU_LEAD_R = crate::FieldReader<u8, u8>;
49#[doc = "Field `ppu_lead` writer - "]
50pub type PPU_LEAD_W<'a, const O: u8> =
51    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
52#[doc = "Field `pud_vco_dly` reader - "]
53pub type PUD_VCO_DLY_R = crate::FieldReader<u8, u8>;
54#[doc = "Field `pud_vco_dly` writer - "]
55pub type PUD_VCO_DLY_W<'a, const O: u8> =
56    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
57#[doc = "Field `pud_iref_dly` reader - "]
58pub type PUD_IREF_DLY_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `pud_iref_dly` writer - "]
60pub type PUD_IREF_DLY_W<'a, const O: u8> =
61    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
62#[doc = "Field `pud_pa_dly` reader - "]
63pub type PUD_PA_DLY_R = crate::FieldReader<u8, u8>;
64#[doc = "Field `pud_pa_dly` writer - "]
65pub type PUD_PA_DLY_W<'a, const O: u8> =
66    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
67#[doc = "Field `mbg_trim` reader - "]
68pub type MBG_TRIM_R = crate::FieldReader<u8, u8>;
69#[doc = "Field `mbg_trim` writer - "]
70pub type MBG_TRIM_W<'a, const O: u8> =
71    crate::FieldWriter<'a, u32, RF_BASE_CTRL1_SPEC, u8, u8, 2, O>;
72impl R {
73    #[doc = "Bits 0:1"]
74    #[inline(always)]
75    pub fn aupll_sdm_rst_dly(&self) -> AUPLL_SDM_RST_DLY_R {
76        AUPLL_SDM_RST_DLY_R::new((self.bits & 3) as u8)
77    }
78    #[doc = "Bits 2:3"]
79    #[inline(always)]
80    pub fn lo_sdm_rst_dly(&self) -> LO_SDM_RST_DLY_R {
81        LO_SDM_RST_DLY_R::new(((self.bits >> 2) & 3) as u8)
82    }
83    #[doc = "Bits 8:9"]
84    #[inline(always)]
85    pub fn ppu_lead(&self) -> PPU_LEAD_R {
86        PPU_LEAD_R::new(((self.bits >> 8) & 3) as u8)
87    }
88    #[doc = "Bits 10:11"]
89    #[inline(always)]
90    pub fn pud_vco_dly(&self) -> PUD_VCO_DLY_R {
91        PUD_VCO_DLY_R::new(((self.bits >> 10) & 3) as u8)
92    }
93    #[doc = "Bits 12:13"]
94    #[inline(always)]
95    pub fn pud_iref_dly(&self) -> PUD_IREF_DLY_R {
96        PUD_IREF_DLY_R::new(((self.bits >> 12) & 3) as u8)
97    }
98    #[doc = "Bits 14:15"]
99    #[inline(always)]
100    pub fn pud_pa_dly(&self) -> PUD_PA_DLY_R {
101        PUD_PA_DLY_R::new(((self.bits >> 14) & 3) as u8)
102    }
103    #[doc = "Bits 27:28"]
104    #[inline(always)]
105    pub fn mbg_trim(&self) -> MBG_TRIM_R {
106        MBG_TRIM_R::new(((self.bits >> 27) & 3) as u8)
107    }
108}
109impl W {
110    #[doc = "Bits 0:1"]
111    #[inline(always)]
112    #[must_use]
113    pub fn aupll_sdm_rst_dly(&mut self) -> AUPLL_SDM_RST_DLY_W<0> {
114        AUPLL_SDM_RST_DLY_W::new(self)
115    }
116    #[doc = "Bits 2:3"]
117    #[inline(always)]
118    #[must_use]
119    pub fn lo_sdm_rst_dly(&mut self) -> LO_SDM_RST_DLY_W<2> {
120        LO_SDM_RST_DLY_W::new(self)
121    }
122    #[doc = "Bits 8:9"]
123    #[inline(always)]
124    #[must_use]
125    pub fn ppu_lead(&mut self) -> PPU_LEAD_W<8> {
126        PPU_LEAD_W::new(self)
127    }
128    #[doc = "Bits 10:11"]
129    #[inline(always)]
130    #[must_use]
131    pub fn pud_vco_dly(&mut self) -> PUD_VCO_DLY_W<10> {
132        PUD_VCO_DLY_W::new(self)
133    }
134    #[doc = "Bits 12:13"]
135    #[inline(always)]
136    #[must_use]
137    pub fn pud_iref_dly(&mut self) -> PUD_IREF_DLY_W<12> {
138        PUD_IREF_DLY_W::new(self)
139    }
140    #[doc = "Bits 14:15"]
141    #[inline(always)]
142    #[must_use]
143    pub fn pud_pa_dly(&mut self) -> PUD_PA_DLY_W<14> {
144        PUD_PA_DLY_W::new(self)
145    }
146    #[doc = "Bits 27:28"]
147    #[inline(always)]
148    #[must_use]
149    pub fn mbg_trim(&mut self) -> MBG_TRIM_W<27> {
150        MBG_TRIM_W::new(self)
151    }
152    #[doc = "Writes raw bits to the register."]
153    #[inline(always)]
154    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
155        self.0.bits(bits);
156        self
157    }
158}
159#[doc = "ZRF Control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rf_base_ctrl1](index.html) module"]
160pub struct RF_BASE_CTRL1_SPEC;
161impl crate::RegisterSpec for RF_BASE_CTRL1_SPEC {
162    type Ux = u32;
163}
164#[doc = "`read()` method returns [rf_base_ctrl1::R](R) reader structure"]
165impl crate::Readable for RF_BASE_CTRL1_SPEC {
166    type Reader = R;
167}
168#[doc = "`write(|w| ..)` method takes [rf_base_ctrl1::W](W) writer structure"]
169impl crate::Writable for RF_BASE_CTRL1_SPEC {
170    type Writer = W;
171    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
172    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
173}
174#[doc = "`reset()` method sets rf_base_ctrl1 to value 0"]
175impl crate::Resettable for RF_BASE_CTRL1_SPEC {
176    const RESET_VALUE: Self::Ux = 0;
177}
bl602_pac/rf/rf_base_ctrl1.rs

bl602_pac/rf/
rf_base_ctrl1.rs
