bl602_pac/i2c/
i2c_fifo_config_1.rs1#[doc = "Register `i2c_fifo_config_1` reader"]
2pub struct R(crate::R<I2C_FIFO_CONFIG_1_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<I2C_FIFO_CONFIG_1_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<I2C_FIFO_CONFIG_1_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<I2C_FIFO_CONFIG_1_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `i2c_fifo_config_1` writer"]
17pub struct W(crate::W<I2C_FIFO_CONFIG_1_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<I2C_FIFO_CONFIG_1_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<I2C_FIFO_CONFIG_1_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<I2C_FIFO_CONFIG_1_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `tx_fifo_cnt` reader - "]
38pub type TX_FIFO_CNT_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `rx_fifo_cnt` reader - "]
40pub type RX_FIFO_CNT_R = crate::FieldReader<u8, u8>;
41#[doc = "Field `tx_fifo_th` reader - "]
42pub type TX_FIFO_TH_R = crate::BitReader<bool>;
43#[doc = "Field `tx_fifo_th` writer - "]
44pub type TX_FIFO_TH_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C_FIFO_CONFIG_1_SPEC, bool, O>;
45#[doc = "Field `rx_fifo_th` reader - "]
46pub type RX_FIFO_TH_R = crate::BitReader<bool>;
47#[doc = "Field `rx_fifo_th` writer - "]
48pub type RX_FIFO_TH_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2C_FIFO_CONFIG_1_SPEC, bool, O>;
49impl R {
50 #[doc = "Bits 0:1"]
51 #[inline(always)]
52 pub fn tx_fifo_cnt(&self) -> TX_FIFO_CNT_R {
53 TX_FIFO_CNT_R::new((self.bits & 3) as u8)
54 }
55 #[doc = "Bits 8:9"]
56 #[inline(always)]
57 pub fn rx_fifo_cnt(&self) -> RX_FIFO_CNT_R {
58 RX_FIFO_CNT_R::new(((self.bits >> 8) & 3) as u8)
59 }
60 #[doc = "Bit 16"]
61 #[inline(always)]
62 pub fn tx_fifo_th(&self) -> TX_FIFO_TH_R {
63 TX_FIFO_TH_R::new(((self.bits >> 16) & 1) != 0)
64 }
65 #[doc = "Bit 24"]
66 #[inline(always)]
67 pub fn rx_fifo_th(&self) -> RX_FIFO_TH_R {
68 RX_FIFO_TH_R::new(((self.bits >> 24) & 1) != 0)
69 }
70}
71impl W {
72 #[doc = "Bit 16"]
73 #[inline(always)]
74 #[must_use]
75 pub fn tx_fifo_th(&mut self) -> TX_FIFO_TH_W<16> {
76 TX_FIFO_TH_W::new(self)
77 }
78 #[doc = "Bit 24"]
79 #[inline(always)]
80 #[must_use]
81 pub fn rx_fifo_th(&mut self) -> RX_FIFO_TH_W<24> {
82 RX_FIFO_TH_W::new(self)
83 }
84 #[doc = "Writes raw bits to the register."]
85 #[inline(always)]
86 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
87 self.0.bits(bits);
88 self
89 }
90}
91#[doc = "i2c_fifo_config_1.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c_fifo_config_1](index.html) module"]
92pub struct I2C_FIFO_CONFIG_1_SPEC;
93impl crate::RegisterSpec for I2C_FIFO_CONFIG_1_SPEC {
94 type Ux = u32;
95}
96#[doc = "`read()` method returns [i2c_fifo_config_1::R](R) reader structure"]
97impl crate::Readable for I2C_FIFO_CONFIG_1_SPEC {
98 type Reader = R;
99}
100#[doc = "`write(|w| ..)` method takes [i2c_fifo_config_1::W](W) writer structure"]
101impl crate::Writable for I2C_FIFO_CONFIG_1_SPEC {
102 type Writer = W;
103 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
104 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
105}
106#[doc = "`reset()` method sets i2c_fifo_config_1 to value 0x02"]
107impl crate::Resettable for I2C_FIFO_CONFIG_1_SPEC {
108 const RESET_VALUE: Self::Ux = 0x02;
109}