bl602_pac/i2c/
i2c_bus_busy.rs

1#[doc = "Register `i2c_bus_busy` reader"]
2pub struct R(crate::R<I2C_BUS_BUSY_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<I2C_BUS_BUSY_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<I2C_BUS_BUSY_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<I2C_BUS_BUSY_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `i2c_bus_busy` writer"]
17pub struct W(crate::W<I2C_BUS_BUSY_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<I2C_BUS_BUSY_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<I2C_BUS_BUSY_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<I2C_BUS_BUSY_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `sts_i2c_bus_busy` reader - "]
38pub type STS_I2C_BUS_BUSY_R = crate::BitReader<bool>;
39#[doc = "Field `cr_i2c_bus_busy_clr` reader - "]
40pub type CR_I2C_BUS_BUSY_CLR_R = crate::BitReader<bool>;
41#[doc = "Field `cr_i2c_bus_busy_clr` writer - "]
42pub type CR_I2C_BUS_BUSY_CLR_W<'a, const O: u8> =
43    crate::BitWriter<'a, u32, I2C_BUS_BUSY_SPEC, bool, O>;
44impl R {
45    #[doc = "Bit 0"]
46    #[inline(always)]
47    pub fn sts_i2c_bus_busy(&self) -> STS_I2C_BUS_BUSY_R {
48        STS_I2C_BUS_BUSY_R::new((self.bits & 1) != 0)
49    }
50    #[doc = "Bit 1"]
51    #[inline(always)]
52    pub fn cr_i2c_bus_busy_clr(&self) -> CR_I2C_BUS_BUSY_CLR_R {
53        CR_I2C_BUS_BUSY_CLR_R::new(((self.bits >> 1) & 1) != 0)
54    }
55}
56impl W {
57    #[doc = "Bit 1"]
58    #[inline(always)]
59    #[must_use]
60    pub fn cr_i2c_bus_busy_clr(&mut self) -> CR_I2C_BUS_BUSY_CLR_W<1> {
61        CR_I2C_BUS_BUSY_CLR_W::new(self)
62    }
63    #[doc = "Writes raw bits to the register."]
64    #[inline(always)]
65    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
66        self.0.bits(bits);
67        self
68    }
69}
70#[doc = "i2c_bus_busy.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2c_bus_busy](index.html) module"]
71pub struct I2C_BUS_BUSY_SPEC;
72impl crate::RegisterSpec for I2C_BUS_BUSY_SPEC {
73    type Ux = u32;
74}
75#[doc = "`read()` method returns [i2c_bus_busy::R](R) reader structure"]
76impl crate::Readable for I2C_BUS_BUSY_SPEC {
77    type Reader = R;
78}
79#[doc = "`write(|w| ..)` method takes [i2c_bus_busy::W](W) writer structure"]
80impl crate::Writable for I2C_BUS_BUSY_SPEC {
81    type Writer = W;
82    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
83    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
84}
85#[doc = "`reset()` method sets i2c_bus_busy to value 0"]
86impl crate::Resettable for I2C_BUS_BUSY_SPEC {
87    const RESET_VALUE: Self::Ux = 0;
88}
bl602_pac/i2c/i2c_bus_busy.rs

bl602_pac/i2c/
i2c_bus_busy.rs
