bl602_pac/glb/
tzc_glb_ctrl_0.rs

1#[doc = "Register `tzc_glb_ctrl_0` reader"]
2pub struct R(crate::R<TZC_GLB_CTRL_0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TZC_GLB_CTRL_0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TZC_GLB_CTRL_0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TZC_GLB_CTRL_0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `tzc_glb_swrst_s00_lock` reader - "]
17pub type TZC_GLB_SWRST_S00_LOCK_R = crate::BitReader<bool>;
18#[doc = "Field `tzc_glb_swrst_s01_lock` reader - "]
19pub type TZC_GLB_SWRST_S01_LOCK_R = crate::BitReader<bool>;
20#[doc = "Field `tzc_glb_swrst_s30_lock` reader - "]
21pub type TZC_GLB_SWRST_S30_LOCK_R = crate::BitReader<bool>;
22#[doc = "Field `tzc_glb_ctrl_pwron_rst_lock` reader - "]
23pub type TZC_GLB_CTRL_PWRON_RST_LOCK_R = crate::BitReader<bool>;
24#[doc = "Field `tzc_glb_ctrl_cpu_reset_lock` reader - "]
25pub type TZC_GLB_CTRL_CPU_RESET_LOCK_R = crate::BitReader<bool>;
26#[doc = "Field `tzc_glb_ctrl_sys_reset_lock` reader - "]
27pub type TZC_GLB_CTRL_SYS_RESET_LOCK_R = crate::BitReader<bool>;
28#[doc = "Field `tzc_glb_ctrl_ungated_ap_lock` reader - "]
29pub type TZC_GLB_CTRL_UNGATED_AP_LOCK_R = crate::BitReader<bool>;
30#[doc = "Field `tzc_glb_misc_lock` reader - "]
31pub type TZC_GLB_MISC_LOCK_R = crate::BitReader<bool>;
32#[doc = "Field `tzc_glb_sram_lock` reader - "]
33pub type TZC_GLB_SRAM_LOCK_R = crate::BitReader<bool>;
34#[doc = "Field `tzc_glb_l2c_lock` reader - "]
35pub type TZC_GLB_L2C_LOCK_R = crate::BitReader<bool>;
36#[doc = "Field `tzc_glb_bmx_lock` reader - "]
37pub type TZC_GLB_BMX_LOCK_R = crate::BitReader<bool>;
38#[doc = "Field `tzc_glb_dbg_lock` reader - "]
39pub type TZC_GLB_DBG_LOCK_R = crate::BitReader<bool>;
40#[doc = "Field `tzc_glb_mbist_lock` reader - "]
41pub type TZC_GLB_MBIST_LOCK_R = crate::BitReader<bool>;
42#[doc = "Field `tzc_glb_clk_lock` reader - "]
43pub type TZC_GLB_CLK_LOCK_R = crate::BitReader<bool>;
44impl R {
45    #[doc = "Bit 0"]
46    #[inline(always)]
47    pub fn tzc_glb_swrst_s00_lock(&self) -> TZC_GLB_SWRST_S00_LOCK_R {
48        TZC_GLB_SWRST_S00_LOCK_R::new((self.bits & 1) != 0)
49    }
50    #[doc = "Bit 1"]
51    #[inline(always)]
52    pub fn tzc_glb_swrst_s01_lock(&self) -> TZC_GLB_SWRST_S01_LOCK_R {
53        TZC_GLB_SWRST_S01_LOCK_R::new(((self.bits >> 1) & 1) != 0)
54    }
55    #[doc = "Bit 8"]
56    #[inline(always)]
57    pub fn tzc_glb_swrst_s30_lock(&self) -> TZC_GLB_SWRST_S30_LOCK_R {
58        TZC_GLB_SWRST_S30_LOCK_R::new(((self.bits >> 8) & 1) != 0)
59    }
60    #[doc = "Bit 12"]
61    #[inline(always)]
62    pub fn tzc_glb_ctrl_pwron_rst_lock(&self) -> TZC_GLB_CTRL_PWRON_RST_LOCK_R {
63        TZC_GLB_CTRL_PWRON_RST_LOCK_R::new(((self.bits >> 12) & 1) != 0)
64    }
65    #[doc = "Bit 13"]
66    #[inline(always)]
67    pub fn tzc_glb_ctrl_cpu_reset_lock(&self) -> TZC_GLB_CTRL_CPU_RESET_LOCK_R {
68        TZC_GLB_CTRL_CPU_RESET_LOCK_R::new(((self.bits >> 13) & 1) != 0)
69    }
70    #[doc = "Bit 14"]
71    #[inline(always)]
72    pub fn tzc_glb_ctrl_sys_reset_lock(&self) -> TZC_GLB_CTRL_SYS_RESET_LOCK_R {
73        TZC_GLB_CTRL_SYS_RESET_LOCK_R::new(((self.bits >> 14) & 1) != 0)
74    }
75    #[doc = "Bit 15"]
76    #[inline(always)]
77    pub fn tzc_glb_ctrl_ungated_ap_lock(&self) -> TZC_GLB_CTRL_UNGATED_AP_LOCK_R {
78        TZC_GLB_CTRL_UNGATED_AP_LOCK_R::new(((self.bits >> 15) & 1) != 0)
79    }
80    #[doc = "Bit 25"]
81    #[inline(always)]
82    pub fn tzc_glb_misc_lock(&self) -> TZC_GLB_MISC_LOCK_R {
83        TZC_GLB_MISC_LOCK_R::new(((self.bits >> 25) & 1) != 0)
84    }
85    #[doc = "Bit 26"]
86    #[inline(always)]
87    pub fn tzc_glb_sram_lock(&self) -> TZC_GLB_SRAM_LOCK_R {
88        TZC_GLB_SRAM_LOCK_R::new(((self.bits >> 26) & 1) != 0)
89    }
90    #[doc = "Bit 27"]
91    #[inline(always)]
92    pub fn tzc_glb_l2c_lock(&self) -> TZC_GLB_L2C_LOCK_R {
93        TZC_GLB_L2C_LOCK_R::new(((self.bits >> 27) & 1) != 0)
94    }
95    #[doc = "Bit 28"]
96    #[inline(always)]
97    pub fn tzc_glb_bmx_lock(&self) -> TZC_GLB_BMX_LOCK_R {
98        TZC_GLB_BMX_LOCK_R::new(((self.bits >> 28) & 1) != 0)
99    }
100    #[doc = "Bit 29"]
101    #[inline(always)]
102    pub fn tzc_glb_dbg_lock(&self) -> TZC_GLB_DBG_LOCK_R {
103        TZC_GLB_DBG_LOCK_R::new(((self.bits >> 29) & 1) != 0)
104    }
105    #[doc = "Bit 30"]
106    #[inline(always)]
107    pub fn tzc_glb_mbist_lock(&self) -> TZC_GLB_MBIST_LOCK_R {
108        TZC_GLB_MBIST_LOCK_R::new(((self.bits >> 30) & 1) != 0)
109    }
110    #[doc = "Bit 31"]
111    #[inline(always)]
112    pub fn tzc_glb_clk_lock(&self) -> TZC_GLB_CLK_LOCK_R {
113        TZC_GLB_CLK_LOCK_R::new(((self.bits >> 31) & 1) != 0)
114    }
115}
116#[doc = "tzc_glb_ctrl_0.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tzc_glb_ctrl_0](index.html) module"]
117pub struct TZC_GLB_CTRL_0_SPEC;
118impl crate::RegisterSpec for TZC_GLB_CTRL_0_SPEC {
119    type Ux = u32;
120}
121#[doc = "`read()` method returns [tzc_glb_ctrl_0::R](R) reader structure"]
122impl crate::Readable for TZC_GLB_CTRL_0_SPEC {
123    type Reader = R;
124}
125#[doc = "`reset()` method sets tzc_glb_ctrl_0 to value 0"]
126impl crate::Resettable for TZC_GLB_CTRL_0_SPEC {
127    const RESET_VALUE: Self::Ux = 0;
128}
bl602_pac/glb/tzc_glb_ctrl_0.rs

bl602_pac/glb/
tzc_glb_ctrl_0.rs
