bl602_pac/dma/
dma_c3config.rs

1#[doc = "Register `DMA_C3Config` reader"]
2pub struct R(crate::R<DMA_C3CONFIG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMA_C3CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMA_C3CONFIG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMA_C3CONFIG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DMA_C3Config` writer"]
17pub struct W(crate::W<DMA_C3CONFIG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DMA_C3CONFIG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DMA_C3CONFIG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DMA_C3CONFIG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `E` reader - "]
38pub type E_R = crate::BitReader<bool>;
39#[doc = "Field `E` writer - "]
40pub type E_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C3CONFIG_SPEC, bool, O>;
41#[doc = "Field `SrcPeripheral` reader - "]
42pub type SRC_PERIPHERAL_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `SrcPeripheral` writer - "]
44pub type SRC_PERIPHERAL_W<'a, const O: u8> =
45    crate::FieldWriter<'a, u32, DMA_C3CONFIG_SPEC, u8, u8, 5, O>;
46#[doc = "Field `DstPeripheral` reader - "]
47pub type DST_PERIPHERAL_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `DstPeripheral` writer - "]
49pub type DST_PERIPHERAL_W<'a, const O: u8> =
50    crate::FieldWriter<'a, u32, DMA_C3CONFIG_SPEC, u8, u8, 5, O>;
51#[doc = "Field `FlowCntrl` reader - "]
52pub type FLOW_CNTRL_R = crate::FieldReader<u8, u8>;
53#[doc = "Field `FlowCntrl` writer - "]
54pub type FLOW_CNTRL_W<'a, const O: u8> =
55    crate::FieldWriter<'a, u32, DMA_C3CONFIG_SPEC, u8, u8, 3, O>;
56#[doc = "Field `IE` reader - "]
57pub type IE_R = crate::BitReader<bool>;
58#[doc = "Field `IE` writer - "]
59pub type IE_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C3CONFIG_SPEC, bool, O>;
60#[doc = "Field `ITC` reader - "]
61pub type ITC_R = crate::BitReader<bool>;
62#[doc = "Field `ITC` writer - "]
63pub type ITC_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C3CONFIG_SPEC, bool, O>;
64#[doc = "Field `L` reader - "]
65pub type L_R = crate::BitReader<bool>;
66#[doc = "Field `L` writer - "]
67pub type L_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C3CONFIG_SPEC, bool, O>;
68#[doc = "Field `A` reader - "]
69pub type A_R = crate::BitReader<bool>;
70#[doc = "Field `H` reader - "]
71pub type H_R = crate::BitReader<bool>;
72#[doc = "Field `H` writer - "]
73pub type H_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C3CONFIG_SPEC, bool, O>;
74impl R {
75    #[doc = "Bit 0"]
76    #[inline(always)]
77    pub fn e(&self) -> E_R {
78        E_R::new((self.bits & 1) != 0)
79    }
80    #[doc = "Bits 1:5"]
81    #[inline(always)]
82    pub fn src_peripheral(&self) -> SRC_PERIPHERAL_R {
83        SRC_PERIPHERAL_R::new(((self.bits >> 1) & 0x1f) as u8)
84    }
85    #[doc = "Bits 6:10"]
86    #[inline(always)]
87    pub fn dst_peripheral(&self) -> DST_PERIPHERAL_R {
88        DST_PERIPHERAL_R::new(((self.bits >> 6) & 0x1f) as u8)
89    }
90    #[doc = "Bits 11:13"]
91    #[inline(always)]
92    pub fn flow_cntrl(&self) -> FLOW_CNTRL_R {
93        FLOW_CNTRL_R::new(((self.bits >> 11) & 7) as u8)
94    }
95    #[doc = "Bit 14"]
96    #[inline(always)]
97    pub fn ie(&self) -> IE_R {
98        IE_R::new(((self.bits >> 14) & 1) != 0)
99    }
100    #[doc = "Bit 15"]
101    #[inline(always)]
102    pub fn itc(&self) -> ITC_R {
103        ITC_R::new(((self.bits >> 15) & 1) != 0)
104    }
105    #[doc = "Bit 16"]
106    #[inline(always)]
107    pub fn l(&self) -> L_R {
108        L_R::new(((self.bits >> 16) & 1) != 0)
109    }
110    #[doc = "Bit 17"]
111    #[inline(always)]
112    pub fn a(&self) -> A_R {
113        A_R::new(((self.bits >> 17) & 1) != 0)
114    }
115    #[doc = "Bit 18"]
116    #[inline(always)]
117    pub fn h(&self) -> H_R {
118        H_R::new(((self.bits >> 18) & 1) != 0)
119    }
120}
121impl W {
122    #[doc = "Bit 0"]
123    #[inline(always)]
124    #[must_use]
125    pub fn e(&mut self) -> E_W<0> {
126        E_W::new(self)
127    }
128    #[doc = "Bits 1:5"]
129    #[inline(always)]
130    #[must_use]
131    pub fn src_peripheral(&mut self) -> SRC_PERIPHERAL_W<1> {
132        SRC_PERIPHERAL_W::new(self)
133    }
134    #[doc = "Bits 6:10"]
135    #[inline(always)]
136    #[must_use]
137    pub fn dst_peripheral(&mut self) -> DST_PERIPHERAL_W<6> {
138        DST_PERIPHERAL_W::new(self)
139    }
140    #[doc = "Bits 11:13"]
141    #[inline(always)]
142    #[must_use]
143    pub fn flow_cntrl(&mut self) -> FLOW_CNTRL_W<11> {
144        FLOW_CNTRL_W::new(self)
145    }
146    #[doc = "Bit 14"]
147    #[inline(always)]
148    #[must_use]
149    pub fn ie(&mut self) -> IE_W<14> {
150        IE_W::new(self)
151    }
152    #[doc = "Bit 15"]
153    #[inline(always)]
154    #[must_use]
155    pub fn itc(&mut self) -> ITC_W<15> {
156        ITC_W::new(self)
157    }
158    #[doc = "Bit 16"]
159    #[inline(always)]
160    #[must_use]
161    pub fn l(&mut self) -> L_W<16> {
162        L_W::new(self)
163    }
164    #[doc = "Bit 18"]
165    #[inline(always)]
166    #[must_use]
167    pub fn h(&mut self) -> H_W<18> {
168        H_W::new(self)
169    }
170    #[doc = "Writes raw bits to the register."]
171    #[inline(always)]
172    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
173        self.0.bits(bits);
174        self
175    }
176}
177#[doc = "DMA_C3Config.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_c3config](index.html) module"]
178pub struct DMA_C3CONFIG_SPEC;
179impl crate::RegisterSpec for DMA_C3CONFIG_SPEC {
180    type Ux = u32;
181}
182#[doc = "`read()` method returns [dma_c3config::R](R) reader structure"]
183impl crate::Readable for DMA_C3CONFIG_SPEC {
184    type Reader = R;
185}
186#[doc = "`write(|w| ..)` method takes [dma_c3config::W](W) writer structure"]
187impl crate::Writable for DMA_C3CONFIG_SPEC {
188    type Writer = W;
189    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
190    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
191}
192#[doc = "`reset()` method sets DMA_C3Config to value 0"]
193impl crate::Resettable for DMA_C3CONFIG_SPEC {
194    const RESET_VALUE: Self::Ux = 0;
195}
bl602_pac/dma/dma_c3config.rs

bl602_pac/dma/
dma_c3config.rs
