bl602_pac/cci/
cci_ctl.rs

1#[doc = "Register `cci_ctl` reader"]
2pub struct R(crate::R<CCI_CTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CCI_CTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CCI_CTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CCI_CTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `cci_ctl` writer"]
17pub struct W(crate::W<CCI_CTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CCI_CTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CCI_CTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CCI_CTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `cci_write_flag` reader - "]
38pub type CCI_WRITE_FLAG_R = crate::BitReader<bool>;
39#[doc = "Field `cci_read_flag` reader - "]
40pub type CCI_READ_FLAG_R = crate::BitReader<bool>;
41#[doc = "Field `ahb_state` reader - "]
42pub type AHB_STATE_R = crate::FieldReader<u8, u8>;
43impl R {
44    #[doc = "Bit 0"]
45    #[inline(always)]
46    pub fn cci_write_flag(&self) -> CCI_WRITE_FLAG_R {
47        CCI_WRITE_FLAG_R::new((self.bits & 1) != 0)
48    }
49    #[doc = "Bit 1"]
50    #[inline(always)]
51    pub fn cci_read_flag(&self) -> CCI_READ_FLAG_R {
52        CCI_READ_FLAG_R::new(((self.bits >> 1) & 1) != 0)
53    }
54    #[doc = "Bits 2:3"]
55    #[inline(always)]
56    pub fn ahb_state(&self) -> AHB_STATE_R {
57        AHB_STATE_R::new(((self.bits >> 2) & 3) as u8)
58    }
59}
60impl W {
61    #[doc = "Writes raw bits to the register."]
62    #[inline(always)]
63    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
64        self.0.bits(bits);
65        self
66    }
67}
68#[doc = "cci_ctl.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cci_ctl](index.html) module"]
69pub struct CCI_CTL_SPEC;
70impl crate::RegisterSpec for CCI_CTL_SPEC {
71    type Ux = u32;
72}
73#[doc = "`read()` method returns [cci_ctl::R](R) reader structure"]
74impl crate::Readable for CCI_CTL_SPEC {
75    type Reader = R;
76}
77#[doc = "`write(|w| ..)` method takes [cci_ctl::W](W) writer structure"]
78impl crate::Writable for CCI_CTL_SPEC {
79    type Writer = W;
80    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
81    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
82}
83#[doc = "`reset()` method sets cci_ctl to value 0"]
84impl crate::Resettable for CCI_CTL_SPEC {
85    const RESET_VALUE: Self::Ux = 0;
86}
bl602_pac/cci/cci_ctl.rs

bl602_pac/cci/
cci_ctl.rs
