bl602_pac/hbn/
hbn_pir_cfg.rs1#[doc = "Register `HBN_PIR_CFG` reader"]
2pub struct R(crate::R<HBN_PIR_CFG_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<HBN_PIR_CFG_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<HBN_PIR_CFG_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<HBN_PIR_CFG_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `HBN_PIR_CFG` writer"]
17pub struct W(crate::W<HBN_PIR_CFG_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<HBN_PIR_CFG_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<HBN_PIR_CFG_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<HBN_PIR_CFG_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `pir_hpf_sel` reader - "]
38pub type PIR_HPF_SEL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `pir_hpf_sel` writer - "]
40pub type PIR_HPF_SEL_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, HBN_PIR_CFG_SPEC, u8, u8, 2, O>;
42#[doc = "Field `pir_lpf_sel` reader - "]
43pub type PIR_LPF_SEL_R = crate::BitReader<bool>;
44#[doc = "Field `pir_lpf_sel` writer - "]
45pub type PIR_LPF_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, HBN_PIR_CFG_SPEC, bool, O>;
46#[doc = "Field `pir_dis` reader - "]
47pub type PIR_DIS_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `pir_dis` writer - "]
49pub type PIR_DIS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HBN_PIR_CFG_SPEC, u8, u8, 2, O>;
50#[doc = "Field `pir_en` reader - "]
51pub type PIR_EN_R = crate::BitReader<bool>;
52#[doc = "Field `pir_en` writer - "]
53pub type PIR_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, HBN_PIR_CFG_SPEC, bool, O>;
54#[doc = "Field `gpadc_cgen` reader - "]
55pub type GPADC_CGEN_R = crate::BitReader<bool>;
56#[doc = "Field `gpadc_cgen` writer - "]
57pub type GPADC_CGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, HBN_PIR_CFG_SPEC, bool, O>;
58#[doc = "Field `gpadc_nosync` reader - "]
59pub type GPADC_NOSYNC_R = crate::BitReader<bool>;
60#[doc = "Field `gpadc_nosync` writer - "]
61pub type GPADC_NOSYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, HBN_PIR_CFG_SPEC, bool, O>;
62impl R {
63 #[doc = "Bits 0:1"]
64 #[inline(always)]
65 pub fn pir_hpf_sel(&self) -> PIR_HPF_SEL_R {
66 PIR_HPF_SEL_R::new((self.bits & 3) as u8)
67 }
68 #[doc = "Bit 2"]
69 #[inline(always)]
70 pub fn pir_lpf_sel(&self) -> PIR_LPF_SEL_R {
71 PIR_LPF_SEL_R::new(((self.bits >> 2) & 1) != 0)
72 }
73 #[doc = "Bits 4:5"]
74 #[inline(always)]
75 pub fn pir_dis(&self) -> PIR_DIS_R {
76 PIR_DIS_R::new(((self.bits >> 4) & 3) as u8)
77 }
78 #[doc = "Bit 7"]
79 #[inline(always)]
80 pub fn pir_en(&self) -> PIR_EN_R {
81 PIR_EN_R::new(((self.bits >> 7) & 1) != 0)
82 }
83 #[doc = "Bit 8"]
84 #[inline(always)]
85 pub fn gpadc_cgen(&self) -> GPADC_CGEN_R {
86 GPADC_CGEN_R::new(((self.bits >> 8) & 1) != 0)
87 }
88 #[doc = "Bit 9"]
89 #[inline(always)]
90 pub fn gpadc_nosync(&self) -> GPADC_NOSYNC_R {
91 GPADC_NOSYNC_R::new(((self.bits >> 9) & 1) != 0)
92 }
93}
94impl W {
95 #[doc = "Bits 0:1"]
96 #[inline(always)]
97 #[must_use]
98 pub fn pir_hpf_sel(&mut self) -> PIR_HPF_SEL_W<0> {
99 PIR_HPF_SEL_W::new(self)
100 }
101 #[doc = "Bit 2"]
102 #[inline(always)]
103 #[must_use]
104 pub fn pir_lpf_sel(&mut self) -> PIR_LPF_SEL_W<2> {
105 PIR_LPF_SEL_W::new(self)
106 }
107 #[doc = "Bits 4:5"]
108 #[inline(always)]
109 #[must_use]
110 pub fn pir_dis(&mut self) -> PIR_DIS_W<4> {
111 PIR_DIS_W::new(self)
112 }
113 #[doc = "Bit 7"]
114 #[inline(always)]
115 #[must_use]
116 pub fn pir_en(&mut self) -> PIR_EN_W<7> {
117 PIR_EN_W::new(self)
118 }
119 #[doc = "Bit 8"]
120 #[inline(always)]
121 #[must_use]
122 pub fn gpadc_cgen(&mut self) -> GPADC_CGEN_W<8> {
123 GPADC_CGEN_W::new(self)
124 }
125 #[doc = "Bit 9"]
126 #[inline(always)]
127 #[must_use]
128 pub fn gpadc_nosync(&mut self) -> GPADC_NOSYNC_W<9> {
129 GPADC_NOSYNC_W::new(self)
130 }
131 #[doc = "Writes raw bits to the register."]
132 #[inline(always)]
133 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
134 self.0.bits(bits);
135 self
136 }
137}
138#[doc = "HBN_PIR_CFG.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hbn_pir_cfg](index.html) module"]
139pub struct HBN_PIR_CFG_SPEC;
140impl crate::RegisterSpec for HBN_PIR_CFG_SPEC {
141 type Ux = u32;
142}
143#[doc = "`read()` method returns [hbn_pir_cfg::R](R) reader structure"]
144impl crate::Readable for HBN_PIR_CFG_SPEC {
145 type Reader = R;
146}
147#[doc = "`write(|w| ..)` method takes [hbn_pir_cfg::W](W) writer structure"]
148impl crate::Writable for HBN_PIR_CFG_SPEC {
149 type Writer = W;
150 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
151 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
152}
153#[doc = "`reset()` method sets HBN_PIR_CFG to value 0"]
154impl crate::Resettable for HBN_PIR_CFG_SPEC {
155 const RESET_VALUE: Self::Ux = 0;
156}