bl602_pac/hbn/
hbn_irq_mode.rs1#[doc = "Register `HBN_IRQ_MODE` reader"]
2pub struct R(crate::R<HBN_IRQ_MODE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<HBN_IRQ_MODE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<HBN_IRQ_MODE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<HBN_IRQ_MODE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `HBN_IRQ_MODE` writer"]
17pub struct W(crate::W<HBN_IRQ_MODE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<HBN_IRQ_MODE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<HBN_IRQ_MODE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<HBN_IRQ_MODE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `hbn_pin_wakeup_mode` reader - "]
38pub type HBN_PIN_WAKEUP_MODE_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `hbn_pin_wakeup_mode` writer - "]
40pub type HBN_PIN_WAKEUP_MODE_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, HBN_IRQ_MODE_SPEC, u8, u8, 3, O>;
42#[doc = "Field `hbn_pin_wakeup_mask` reader - "]
43pub type HBN_PIN_WAKEUP_MASK_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `hbn_pin_wakeup_mask` writer - "]
45pub type HBN_PIN_WAKEUP_MASK_W<'a, const O: u8> =
46 crate::FieldWriter<'a, u32, HBN_IRQ_MODE_SPEC, u8, u8, 2, O>;
47#[doc = "Field `reg_aon_pad_ie_smt` reader - "]
48pub type REG_AON_PAD_IE_SMT_R = crate::BitReader<bool>;
49#[doc = "Field `reg_aon_pad_ie_smt` writer - "]
50pub type REG_AON_PAD_IE_SMT_W<'a, const O: u8> =
51 crate::BitWriter<'a, u32, HBN_IRQ_MODE_SPEC, bool, O>;
52#[doc = "Field `reg_en_hw_pu_pd` reader - "]
53pub type REG_EN_HW_PU_PD_R = crate::BitReader<bool>;
54#[doc = "Field `reg_en_hw_pu_pd` writer - "]
55pub type REG_EN_HW_PU_PD_W<'a, const O: u8> = crate::BitWriter<'a, u32, HBN_IRQ_MODE_SPEC, bool, O>;
56#[doc = "Field `irq_bor_en` reader - "]
57pub type IRQ_BOR_EN_R = crate::BitReader<bool>;
58#[doc = "Field `irq_bor_en` writer - "]
59pub type IRQ_BOR_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, HBN_IRQ_MODE_SPEC, bool, O>;
60#[doc = "Field `irq_acomp0_en` reader - "]
61pub type IRQ_ACOMP0_EN_R = crate::FieldReader<u8, u8>;
62#[doc = "Field `irq_acomp0_en` writer - "]
63pub type IRQ_ACOMP0_EN_W<'a, const O: u8> =
64 crate::FieldWriter<'a, u32, HBN_IRQ_MODE_SPEC, u8, u8, 2, O>;
65#[doc = "Field `irq_acomp1_en` reader - "]
66pub type IRQ_ACOMP1_EN_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `irq_acomp1_en` writer - "]
68pub type IRQ_ACOMP1_EN_W<'a, const O: u8> =
69 crate::FieldWriter<'a, u32, HBN_IRQ_MODE_SPEC, u8, u8, 2, O>;
70#[doc = "Field `pin_wakeup_sel` reader - "]
71pub type PIN_WAKEUP_SEL_R = crate::FieldReader<u8, u8>;
72#[doc = "Field `pin_wakeup_sel` writer - "]
73pub type PIN_WAKEUP_SEL_W<'a, const O: u8> =
74 crate::FieldWriter<'a, u32, HBN_IRQ_MODE_SPEC, u8, u8, 3, O>;
75#[doc = "Field `pin_wakeup_en` reader - "]
76pub type PIN_WAKEUP_EN_R = crate::BitReader<bool>;
77#[doc = "Field `pin_wakeup_en` writer - "]
78pub type PIN_WAKEUP_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, HBN_IRQ_MODE_SPEC, bool, O>;
79impl R {
80 #[doc = "Bits 0:2"]
81 #[inline(always)]
82 pub fn hbn_pin_wakeup_mode(&self) -> HBN_PIN_WAKEUP_MODE_R {
83 HBN_PIN_WAKEUP_MODE_R::new((self.bits & 7) as u8)
84 }
85 #[doc = "Bits 3:4"]
86 #[inline(always)]
87 pub fn hbn_pin_wakeup_mask(&self) -> HBN_PIN_WAKEUP_MASK_R {
88 HBN_PIN_WAKEUP_MASK_R::new(((self.bits >> 3) & 3) as u8)
89 }
90 #[doc = "Bit 8"]
91 #[inline(always)]
92 pub fn reg_aon_pad_ie_smt(&self) -> REG_AON_PAD_IE_SMT_R {
93 REG_AON_PAD_IE_SMT_R::new(((self.bits >> 8) & 1) != 0)
94 }
95 #[doc = "Bit 16"]
96 #[inline(always)]
97 pub fn reg_en_hw_pu_pd(&self) -> REG_EN_HW_PU_PD_R {
98 REG_EN_HW_PU_PD_R::new(((self.bits >> 16) & 1) != 0)
99 }
100 #[doc = "Bit 18"]
101 #[inline(always)]
102 pub fn irq_bor_en(&self) -> IRQ_BOR_EN_R {
103 IRQ_BOR_EN_R::new(((self.bits >> 18) & 1) != 0)
104 }
105 #[doc = "Bits 20:21"]
106 #[inline(always)]
107 pub fn irq_acomp0_en(&self) -> IRQ_ACOMP0_EN_R {
108 IRQ_ACOMP0_EN_R::new(((self.bits >> 20) & 3) as u8)
109 }
110 #[doc = "Bits 22:23"]
111 #[inline(always)]
112 pub fn irq_acomp1_en(&self) -> IRQ_ACOMP1_EN_R {
113 IRQ_ACOMP1_EN_R::new(((self.bits >> 22) & 3) as u8)
114 }
115 #[doc = "Bits 24:26"]
116 #[inline(always)]
117 pub fn pin_wakeup_sel(&self) -> PIN_WAKEUP_SEL_R {
118 PIN_WAKEUP_SEL_R::new(((self.bits >> 24) & 7) as u8)
119 }
120 #[doc = "Bit 27"]
121 #[inline(always)]
122 pub fn pin_wakeup_en(&self) -> PIN_WAKEUP_EN_R {
123 PIN_WAKEUP_EN_R::new(((self.bits >> 27) & 1) != 0)
124 }
125}
126impl W {
127 #[doc = "Bits 0:2"]
128 #[inline(always)]
129 #[must_use]
130 pub fn hbn_pin_wakeup_mode(&mut self) -> HBN_PIN_WAKEUP_MODE_W<0> {
131 HBN_PIN_WAKEUP_MODE_W::new(self)
132 }
133 #[doc = "Bits 3:4"]
134 #[inline(always)]
135 #[must_use]
136 pub fn hbn_pin_wakeup_mask(&mut self) -> HBN_PIN_WAKEUP_MASK_W<3> {
137 HBN_PIN_WAKEUP_MASK_W::new(self)
138 }
139 #[doc = "Bit 8"]
140 #[inline(always)]
141 #[must_use]
142 pub fn reg_aon_pad_ie_smt(&mut self) -> REG_AON_PAD_IE_SMT_W<8> {
143 REG_AON_PAD_IE_SMT_W::new(self)
144 }
145 #[doc = "Bit 16"]
146 #[inline(always)]
147 #[must_use]
148 pub fn reg_en_hw_pu_pd(&mut self) -> REG_EN_HW_PU_PD_W<16> {
149 REG_EN_HW_PU_PD_W::new(self)
150 }
151 #[doc = "Bit 18"]
152 #[inline(always)]
153 #[must_use]
154 pub fn irq_bor_en(&mut self) -> IRQ_BOR_EN_W<18> {
155 IRQ_BOR_EN_W::new(self)
156 }
157 #[doc = "Bits 20:21"]
158 #[inline(always)]
159 #[must_use]
160 pub fn irq_acomp0_en(&mut self) -> IRQ_ACOMP0_EN_W<20> {
161 IRQ_ACOMP0_EN_W::new(self)
162 }
163 #[doc = "Bits 22:23"]
164 #[inline(always)]
165 #[must_use]
166 pub fn irq_acomp1_en(&mut self) -> IRQ_ACOMP1_EN_W<22> {
167 IRQ_ACOMP1_EN_W::new(self)
168 }
169 #[doc = "Bits 24:26"]
170 #[inline(always)]
171 #[must_use]
172 pub fn pin_wakeup_sel(&mut self) -> PIN_WAKEUP_SEL_W<24> {
173 PIN_WAKEUP_SEL_W::new(self)
174 }
175 #[doc = "Bit 27"]
176 #[inline(always)]
177 #[must_use]
178 pub fn pin_wakeup_en(&mut self) -> PIN_WAKEUP_EN_W<27> {
179 PIN_WAKEUP_EN_W::new(self)
180 }
181 #[doc = "Writes raw bits to the register."]
182 #[inline(always)]
183 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
184 self.0.bits(bits);
185 self
186 }
187}
188#[doc = "HBN_IRQ_MODE.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hbn_irq_mode](index.html) module"]
189pub struct HBN_IRQ_MODE_SPEC;
190impl crate::RegisterSpec for HBN_IRQ_MODE_SPEC {
191 type Ux = u32;
192}
193#[doc = "`read()` method returns [hbn_irq_mode::R](R) reader structure"]
194impl crate::Readable for HBN_IRQ_MODE_SPEC {
195 type Reader = R;
196}
197#[doc = "`write(|w| ..)` method takes [hbn_irq_mode::W](W) writer structure"]
198impl crate::Writable for HBN_IRQ_MODE_SPEC {
199 type Writer = W;
200 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
201 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
202}
203#[doc = "`reset()` method sets HBN_IRQ_MODE to value 0x0301_0105"]
204impl crate::Resettable for HBN_IRQ_MODE_SPEC {
205 const RESET_VALUE: Self::Ux = 0x0301_0105;
206}