bl602_pac/glb/
clk_cfg3.rs

1#[doc = "Register `clk_cfg3` reader"]
2pub struct R(crate::R<CLK_CFG3_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CLK_CFG3_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CLK_CFG3_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CLK_CFG3_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `clk_cfg3` writer"]
17pub struct W(crate::W<CLK_CFG3_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CLK_CFG3_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CLK_CFG3_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CLK_CFG3_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `spi_clk_div` reader - "]
38pub type SPI_CLK_DIV_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `spi_clk_div` writer - "]
40pub type SPI_CLK_DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLK_CFG3_SPEC, u8, u8, 5, O>;
41#[doc = "Field `spi_clk_en` reader - "]
42pub type SPI_CLK_EN_R = crate::BitReader<bool>;
43#[doc = "Field `spi_clk_en` writer - "]
44pub type SPI_CLK_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLK_CFG3_SPEC, bool, O>;
45#[doc = "Field `i2c_clk_div` reader - "]
46pub type I2C_CLK_DIV_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `i2c_clk_div` writer - "]
48pub type I2C_CLK_DIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CLK_CFG3_SPEC, u8, u8, 8, O>;
49#[doc = "Field `i2c_clk_en` reader - "]
50pub type I2C_CLK_EN_R = crate::BitReader<bool>;
51#[doc = "Field `i2c_clk_en` writer - "]
52pub type I2C_CLK_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CLK_CFG3_SPEC, bool, O>;
53impl R {
54    #[doc = "Bits 0:4"]
55    #[inline(always)]
56    pub fn spi_clk_div(&self) -> SPI_CLK_DIV_R {
57        SPI_CLK_DIV_R::new((self.bits & 0x1f) as u8)
58    }
59    #[doc = "Bit 8"]
60    #[inline(always)]
61    pub fn spi_clk_en(&self) -> SPI_CLK_EN_R {
62        SPI_CLK_EN_R::new(((self.bits >> 8) & 1) != 0)
63    }
64    #[doc = "Bits 16:23"]
65    #[inline(always)]
66    pub fn i2c_clk_div(&self) -> I2C_CLK_DIV_R {
67        I2C_CLK_DIV_R::new(((self.bits >> 16) & 0xff) as u8)
68    }
69    #[doc = "Bit 24"]
70    #[inline(always)]
71    pub fn i2c_clk_en(&self) -> I2C_CLK_EN_R {
72        I2C_CLK_EN_R::new(((self.bits >> 24) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bits 0:4"]
77    #[inline(always)]
78    #[must_use]
79    pub fn spi_clk_div(&mut self) -> SPI_CLK_DIV_W<0> {
80        SPI_CLK_DIV_W::new(self)
81    }
82    #[doc = "Bit 8"]
83    #[inline(always)]
84    #[must_use]
85    pub fn spi_clk_en(&mut self) -> SPI_CLK_EN_W<8> {
86        SPI_CLK_EN_W::new(self)
87    }
88    #[doc = "Bits 16:23"]
89    #[inline(always)]
90    #[must_use]
91    pub fn i2c_clk_div(&mut self) -> I2C_CLK_DIV_W<16> {
92        I2C_CLK_DIV_W::new(self)
93    }
94    #[doc = "Bit 24"]
95    #[inline(always)]
96    #[must_use]
97    pub fn i2c_clk_en(&mut self) -> I2C_CLK_EN_W<24> {
98        I2C_CLK_EN_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "Clock configuration for I2C and SPI\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_cfg3](index.html) module"]
108pub struct CLK_CFG3_SPEC;
109impl crate::RegisterSpec for CLK_CFG3_SPEC {
110    type Ux = u32;
111}
112#[doc = "`read()` method returns [clk_cfg3::R](R) reader structure"]
113impl crate::Readable for CLK_CFG3_SPEC {
114    type Reader = R;
115}
116#[doc = "`write(|w| ..)` method takes [clk_cfg3::W](W) writer structure"]
117impl crate::Writable for CLK_CFG3_SPEC {
118    type Writer = W;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121}
122#[doc = "`reset()` method sets clk_cfg3 to value 0x01ff_0103"]
123impl crate::Resettable for CLK_CFG3_SPEC {
124    const RESET_VALUE: Self::Ux = 0x01ff_0103;
125}
bl602_pac/glb/clk_cfg3.rs

bl602_pac/glb/
clk_cfg3.rs
