bl602_pac/glb/
bmx_cfg2.rs

1#[doc = "Register `bmx_cfg2` reader"]
2pub struct R(crate::R<BMX_CFG2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<BMX_CFG2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<BMX_CFG2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<BMX_CFG2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `bmx_cfg2` writer"]
17pub struct W(crate::W<BMX_CFG2_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<BMX_CFG2_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<BMX_CFG2_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<BMX_CFG2_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `bmx_err_addr_dis` reader - BMX address monitor disable"]
38pub type BMX_ERR_ADDR_DIS_R = crate::BitReader<bool>;
39#[doc = "Field `bmx_err_addr_dis` writer - BMX address monitor disable"]
40pub type BMX_ERR_ADDR_DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, BMX_CFG2_SPEC, bool, O>;
41#[doc = "Field `bmx_err_dec` reader - "]
42pub type BMX_ERR_DEC_R = crate::BitReader<bool>;
43#[doc = "Field `bmx_err_tz` reader - "]
44pub type BMX_ERR_TZ_R = crate::BitReader<bool>;
45#[doc = "Field `bmx_dbg_sel` reader - "]
46pub type BMX_DBG_SEL_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `bmx_dbg_sel` writer - "]
48pub type BMX_DBG_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BMX_CFG2_SPEC, u8, u8, 4, O>;
49impl R {
50    #[doc = "Bit 0 - BMX address monitor disable"]
51    #[inline(always)]
52    pub fn bmx_err_addr_dis(&self) -> BMX_ERR_ADDR_DIS_R {
53        BMX_ERR_ADDR_DIS_R::new((self.bits & 1) != 0)
54    }
55    #[doc = "Bit 4"]
56    #[inline(always)]
57    pub fn bmx_err_dec(&self) -> BMX_ERR_DEC_R {
58        BMX_ERR_DEC_R::new(((self.bits >> 4) & 1) != 0)
59    }
60    #[doc = "Bit 5"]
61    #[inline(always)]
62    pub fn bmx_err_tz(&self) -> BMX_ERR_TZ_R {
63        BMX_ERR_TZ_R::new(((self.bits >> 5) & 1) != 0)
64    }
65    #[doc = "Bits 28:31"]
66    #[inline(always)]
67    pub fn bmx_dbg_sel(&self) -> BMX_DBG_SEL_R {
68        BMX_DBG_SEL_R::new(((self.bits >> 28) & 0x0f) as u8)
69    }
70}
71impl W {
72    #[doc = "Bit 0 - BMX address monitor disable"]
73    #[inline(always)]
74    #[must_use]
75    pub fn bmx_err_addr_dis(&mut self) -> BMX_ERR_ADDR_DIS_W<0> {
76        BMX_ERR_ADDR_DIS_W::new(self)
77    }
78    #[doc = "Bits 28:31"]
79    #[inline(always)]
80    #[must_use]
81    pub fn bmx_dbg_sel(&mut self) -> BMX_DBG_SEL_W<28> {
82        BMX_DBG_SEL_W::new(self)
83    }
84    #[doc = "Writes raw bits to the register."]
85    #[inline(always)]
86    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
87        self.0.bits(bits);
88        self
89    }
90}
91#[doc = "bmx_cfg2.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bmx_cfg2](index.html) module"]
92pub struct BMX_CFG2_SPEC;
93impl crate::RegisterSpec for BMX_CFG2_SPEC {
94    type Ux = u32;
95}
96#[doc = "`read()` method returns [bmx_cfg2::R](R) reader structure"]
97impl crate::Readable for BMX_CFG2_SPEC {
98    type Reader = R;
99}
100#[doc = "`write(|w| ..)` method takes [bmx_cfg2::W](W) writer structure"]
101impl crate::Writable for BMX_CFG2_SPEC {
102    type Writer = W;
103    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
104    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
105}
106#[doc = "`reset()` method sets bmx_cfg2 to value 0"]
107impl crate::Resettable for BMX_CFG2_SPEC {
108    const RESET_VALUE: Self::Ux = 0;
109}