bl602_pac/uart/
uart_fifo_wdata.rs1#[doc = "Register `uart_fifo_wdata` writer"]
2pub struct W(crate::W<UART_FIFO_WDATA_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<UART_FIFO_WDATA_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<UART_FIFO_WDATA_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<UART_FIFO_WDATA_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `uart_fifo_wdata` writer - "]
23pub type UART_FIFO_WDATA_W<'a, const O: u8> =
24 crate::FieldWriter<'a, u32, UART_FIFO_WDATA_SPEC, u8, u8, 8, O>;
25impl W {
26 #[doc = "Bits 0:7"]
27 #[inline(always)]
28 #[must_use]
29 pub fn uart_fifo_wdata(&mut self) -> UART_FIFO_WDATA_W<0> {
30 UART_FIFO_WDATA_W::new(self)
31 }
32 #[doc = "Writes raw bits to the register."]
33 #[inline(always)]
34 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
35 self.0.bits(bits);
36 self
37 }
38}
39#[doc = "uart_fifo_wdata.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_fifo_wdata](index.html) module"]
40pub struct UART_FIFO_WDATA_SPEC;
41impl crate::RegisterSpec for UART_FIFO_WDATA_SPEC {
42 type Ux = u32;
43}
44#[doc = "`write(|w| ..)` method takes [uart_fifo_wdata::W](W) writer structure"]
45impl crate::Writable for UART_FIFO_WDATA_SPEC {
46 type Writer = W;
47 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
48 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
49}
50#[doc = "`reset()` method sets uart_fifo_wdata to value 0"]
51impl crate::Resettable for UART_FIFO_WDATA_SPEC {
52 const RESET_VALUE: Self::Ux = 0;
53}