bl602_pac/sf_ctrl/
sf_ctrl_0.rs1#[doc = "Register `sf_ctrl_0` reader"]
2pub struct R(crate::R<SF_CTRL_0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SF_CTRL_0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SF_CTRL_0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SF_CTRL_0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `sf_ctrl_0` writer"]
17pub struct W(crate::W<SF_CTRL_0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SF_CTRL_0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SF_CTRL_0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SF_CTRL_0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `sf_clk_sf_rx_inv_sel` reader - "]
38pub type SF_CLK_SF_RX_INV_SEL_R = crate::BitReader<bool>;
39#[doc = "Field `sf_clk_sf_rx_inv_sel` writer - "]
40pub type SF_CLK_SF_RX_INV_SEL_W<'a, const O: u8> =
41 crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
42#[doc = "Field `sf_clk_out_gate_en` reader - "]
43pub type SF_CLK_OUT_GATE_EN_R = crate::BitReader<bool>;
44#[doc = "Field `sf_clk_out_gate_en` writer - "]
45pub type SF_CLK_OUT_GATE_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
46#[doc = "Field `sf_clk_out_inv_sel` reader - "]
47pub type SF_CLK_OUT_INV_SEL_R = crate::BitReader<bool>;
48#[doc = "Field `sf_clk_out_inv_sel` writer - "]
49pub type SF_CLK_OUT_INV_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
50#[doc = "Field `sf_clk_sahb_sram_sel` reader - "]
51pub type SF_CLK_SAHB_SRAM_SEL_R = crate::BitReader<bool>;
52#[doc = "Field `sf_clk_sahb_sram_sel` writer - "]
53pub type SF_CLK_SAHB_SRAM_SEL_W<'a, const O: u8> =
54 crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
55#[doc = "Field `sf_if_read_dly_n` reader - "]
56pub type SF_IF_READ_DLY_N_R = crate::FieldReader<u8, u8>;
57#[doc = "Field `sf_if_read_dly_n` writer - "]
58pub type SF_IF_READ_DLY_N_W<'a, const O: u8> =
59 crate::FieldWriter<'a, u32, SF_CTRL_0_SPEC, u8, u8, 3, O>;
60#[doc = "Field `sf_if_read_dly_en` reader - "]
61pub type SF_IF_READ_DLY_EN_R = crate::BitReader<bool>;
62#[doc = "Field `sf_if_read_dly_en` writer - "]
63pub type SF_IF_READ_DLY_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
64#[doc = "Field `sf_if_int` reader - "]
65pub type SF_IF_INT_R = crate::BitReader<bool>;
66#[doc = "Field `sf_if_int_clr` reader - "]
67pub type SF_IF_INT_CLR_R = crate::BitReader<bool>;
68#[doc = "Field `sf_if_int_clr` writer - "]
69pub type SF_IF_INT_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
70#[doc = "Field `sf_if_int_set` reader - "]
71pub type SF_IF_INT_SET_R = crate::BitReader<bool>;
72#[doc = "Field `sf_if_int_set` writer - "]
73pub type SF_IF_INT_SET_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
74#[doc = "Field `sf_aes_dly_mode` reader - "]
75pub type SF_AES_DLY_MODE_R = crate::BitReader<bool>;
76#[doc = "Field `sf_aes_dly_mode` writer - "]
77pub type SF_AES_DLY_MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
78#[doc = "Field `sf_aes_dout_endian` reader - "]
79pub type SF_AES_DOUT_ENDIAN_R = crate::BitReader<bool>;
80#[doc = "Field `sf_aes_dout_endian` writer - "]
81pub type SF_AES_DOUT_ENDIAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
82#[doc = "Field `sf_aes_ctr_plus_en` reader - "]
83pub type SF_AES_CTR_PLUS_EN_R = crate::BitReader<bool>;
84#[doc = "Field `sf_aes_ctr_plus_en` writer - "]
85pub type SF_AES_CTR_PLUS_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
86#[doc = "Field `sf_aes_key_endian` reader - "]
87pub type SF_AES_KEY_ENDIAN_R = crate::BitReader<bool>;
88#[doc = "Field `sf_aes_key_endian` writer - "]
89pub type SF_AES_KEY_ENDIAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
90#[doc = "Field `sf_aes_iv_endian` reader - "]
91pub type SF_AES_IV_ENDIAN_R = crate::BitReader<bool>;
92#[doc = "Field `sf_aes_iv_endian` writer - "]
93pub type SF_AES_IV_ENDIAN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SF_CTRL_0_SPEC, bool, O>;
94#[doc = "Field `sf_id` reader - "]
95pub type SF_ID_R = crate::FieldReader<u8, u8>;
96#[doc = "Field `sf_id` writer - "]
97pub type SF_ID_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SF_CTRL_0_SPEC, u8, u8, 8, O>;
98impl R {
99 #[doc = "Bit 2"]
100 #[inline(always)]
101 pub fn sf_clk_sf_rx_inv_sel(&self) -> SF_CLK_SF_RX_INV_SEL_R {
102 SF_CLK_SF_RX_INV_SEL_R::new(((self.bits >> 2) & 1) != 0)
103 }
104 #[doc = "Bit 3"]
105 #[inline(always)]
106 pub fn sf_clk_out_gate_en(&self) -> SF_CLK_OUT_GATE_EN_R {
107 SF_CLK_OUT_GATE_EN_R::new(((self.bits >> 3) & 1) != 0)
108 }
109 #[doc = "Bit 4"]
110 #[inline(always)]
111 pub fn sf_clk_out_inv_sel(&self) -> SF_CLK_OUT_INV_SEL_R {
112 SF_CLK_OUT_INV_SEL_R::new(((self.bits >> 4) & 1) != 0)
113 }
114 #[doc = "Bit 5"]
115 #[inline(always)]
116 pub fn sf_clk_sahb_sram_sel(&self) -> SF_CLK_SAHB_SRAM_SEL_R {
117 SF_CLK_SAHB_SRAM_SEL_R::new(((self.bits >> 5) & 1) != 0)
118 }
119 #[doc = "Bits 8:10"]
120 #[inline(always)]
121 pub fn sf_if_read_dly_n(&self) -> SF_IF_READ_DLY_N_R {
122 SF_IF_READ_DLY_N_R::new(((self.bits >> 8) & 7) as u8)
123 }
124 #[doc = "Bit 11"]
125 #[inline(always)]
126 pub fn sf_if_read_dly_en(&self) -> SF_IF_READ_DLY_EN_R {
127 SF_IF_READ_DLY_EN_R::new(((self.bits >> 11) & 1) != 0)
128 }
129 #[doc = "Bit 16"]
130 #[inline(always)]
131 pub fn sf_if_int(&self) -> SF_IF_INT_R {
132 SF_IF_INT_R::new(((self.bits >> 16) & 1) != 0)
133 }
134 #[doc = "Bit 17"]
135 #[inline(always)]
136 pub fn sf_if_int_clr(&self) -> SF_IF_INT_CLR_R {
137 SF_IF_INT_CLR_R::new(((self.bits >> 17) & 1) != 0)
138 }
139 #[doc = "Bit 18"]
140 #[inline(always)]
141 pub fn sf_if_int_set(&self) -> SF_IF_INT_SET_R {
142 SF_IF_INT_SET_R::new(((self.bits >> 18) & 1) != 0)
143 }
144 #[doc = "Bit 19"]
145 #[inline(always)]
146 pub fn sf_aes_dly_mode(&self) -> SF_AES_DLY_MODE_R {
147 SF_AES_DLY_MODE_R::new(((self.bits >> 19) & 1) != 0)
148 }
149 #[doc = "Bit 20"]
150 #[inline(always)]
151 pub fn sf_aes_dout_endian(&self) -> SF_AES_DOUT_ENDIAN_R {
152 SF_AES_DOUT_ENDIAN_R::new(((self.bits >> 20) & 1) != 0)
153 }
154 #[doc = "Bit 21"]
155 #[inline(always)]
156 pub fn sf_aes_ctr_plus_en(&self) -> SF_AES_CTR_PLUS_EN_R {
157 SF_AES_CTR_PLUS_EN_R::new(((self.bits >> 21) & 1) != 0)
158 }
159 #[doc = "Bit 22"]
160 #[inline(always)]
161 pub fn sf_aes_key_endian(&self) -> SF_AES_KEY_ENDIAN_R {
162 SF_AES_KEY_ENDIAN_R::new(((self.bits >> 22) & 1) != 0)
163 }
164 #[doc = "Bit 23"]
165 #[inline(always)]
166 pub fn sf_aes_iv_endian(&self) -> SF_AES_IV_ENDIAN_R {
167 SF_AES_IV_ENDIAN_R::new(((self.bits >> 23) & 1) != 0)
168 }
169 #[doc = "Bits 24:31"]
170 #[inline(always)]
171 pub fn sf_id(&self) -> SF_ID_R {
172 SF_ID_R::new(((self.bits >> 24) & 0xff) as u8)
173 }
174}
175impl W {
176 #[doc = "Bit 2"]
177 #[inline(always)]
178 #[must_use]
179 pub fn sf_clk_sf_rx_inv_sel(&mut self) -> SF_CLK_SF_RX_INV_SEL_W<2> {
180 SF_CLK_SF_RX_INV_SEL_W::new(self)
181 }
182 #[doc = "Bit 3"]
183 #[inline(always)]
184 #[must_use]
185 pub fn sf_clk_out_gate_en(&mut self) -> SF_CLK_OUT_GATE_EN_W<3> {
186 SF_CLK_OUT_GATE_EN_W::new(self)
187 }
188 #[doc = "Bit 4"]
189 #[inline(always)]
190 #[must_use]
191 pub fn sf_clk_out_inv_sel(&mut self) -> SF_CLK_OUT_INV_SEL_W<4> {
192 SF_CLK_OUT_INV_SEL_W::new(self)
193 }
194 #[doc = "Bit 5"]
195 #[inline(always)]
196 #[must_use]
197 pub fn sf_clk_sahb_sram_sel(&mut self) -> SF_CLK_SAHB_SRAM_SEL_W<5> {
198 SF_CLK_SAHB_SRAM_SEL_W::new(self)
199 }
200 #[doc = "Bits 8:10"]
201 #[inline(always)]
202 #[must_use]
203 pub fn sf_if_read_dly_n(&mut self) -> SF_IF_READ_DLY_N_W<8> {
204 SF_IF_READ_DLY_N_W::new(self)
205 }
206 #[doc = "Bit 11"]
207 #[inline(always)]
208 #[must_use]
209 pub fn sf_if_read_dly_en(&mut self) -> SF_IF_READ_DLY_EN_W<11> {
210 SF_IF_READ_DLY_EN_W::new(self)
211 }
212 #[doc = "Bit 17"]
213 #[inline(always)]
214 #[must_use]
215 pub fn sf_if_int_clr(&mut self) -> SF_IF_INT_CLR_W<17> {
216 SF_IF_INT_CLR_W::new(self)
217 }
218 #[doc = "Bit 18"]
219 #[inline(always)]
220 #[must_use]
221 pub fn sf_if_int_set(&mut self) -> SF_IF_INT_SET_W<18> {
222 SF_IF_INT_SET_W::new(self)
223 }
224 #[doc = "Bit 19"]
225 #[inline(always)]
226 #[must_use]
227 pub fn sf_aes_dly_mode(&mut self) -> SF_AES_DLY_MODE_W<19> {
228 SF_AES_DLY_MODE_W::new(self)
229 }
230 #[doc = "Bit 20"]
231 #[inline(always)]
232 #[must_use]
233 pub fn sf_aes_dout_endian(&mut self) -> SF_AES_DOUT_ENDIAN_W<20> {
234 SF_AES_DOUT_ENDIAN_W::new(self)
235 }
236 #[doc = "Bit 21"]
237 #[inline(always)]
238 #[must_use]
239 pub fn sf_aes_ctr_plus_en(&mut self) -> SF_AES_CTR_PLUS_EN_W<21> {
240 SF_AES_CTR_PLUS_EN_W::new(self)
241 }
242 #[doc = "Bit 22"]
243 #[inline(always)]
244 #[must_use]
245 pub fn sf_aes_key_endian(&mut self) -> SF_AES_KEY_ENDIAN_W<22> {
246 SF_AES_KEY_ENDIAN_W::new(self)
247 }
248 #[doc = "Bit 23"]
249 #[inline(always)]
250 #[must_use]
251 pub fn sf_aes_iv_endian(&mut self) -> SF_AES_IV_ENDIAN_W<23> {
252 SF_AES_IV_ENDIAN_W::new(self)
253 }
254 #[doc = "Bits 24:31"]
255 #[inline(always)]
256 #[must_use]
257 pub fn sf_id(&mut self) -> SF_ID_W<24> {
258 SF_ID_W::new(self)
259 }
260 #[doc = "Writes raw bits to the register."]
261 #[inline(always)]
262 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
263 self.0.bits(bits);
264 self
265 }
266}
267#[doc = "sf_ctrl_0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sf_ctrl_0](index.html) module"]
268pub struct SF_CTRL_0_SPEC;
269impl crate::RegisterSpec for SF_CTRL_0_SPEC {
270 type Ux = u32;
271}
272#[doc = "`read()` method returns [sf_ctrl_0::R](R) reader structure"]
273impl crate::Readable for SF_CTRL_0_SPEC {
274 type Reader = R;
275}
276#[doc = "`write(|w| ..)` method takes [sf_ctrl_0::W](W) writer structure"]
277impl crate::Writable for SF_CTRL_0_SPEC {
278 type Writer = W;
279 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
280 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
281}
282#[doc = "`reset()` method sets sf_ctrl_0 to value 0x1ad2_001c"]
283impl crate::Resettable for SF_CTRL_0_SPEC {
284 const RESET_VALUE: Self::Ux = 0x1ad2_001c;
285}