1#[doc = "Register `rfif_dfe_ctrl0` reader"]
2pub struct R(crate::R<RFIF_DFE_CTRL0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<RFIF_DFE_CTRL0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<RFIF_DFE_CTRL0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<RFIF_DFE_CTRL0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `rfif_dfe_ctrl0` writer"]
17pub struct W(crate::W<RFIF_DFE_CTRL0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<RFIF_DFE_CTRL0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<RFIF_DFE_CTRL0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<RFIF_DFE_CTRL0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `rfckg_rxclk_4s_on` reader - "]
38pub type RFCKG_RXCLK_4S_ON_R = crate::BitReader<bool>;
39#[doc = "Field `rfckg_rxclk_4s_on` writer - "]
40pub type RFCKG_RXCLK_4S_ON_W<'a, const O: u8> =
41 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
42#[doc = "Field `rfckg_txclk_4s_on` reader - "]
43pub type RFCKG_TXCLK_4S_ON_R = crate::BitReader<bool>;
44#[doc = "Field `rfckg_txclk_4s_on` writer - "]
45pub type RFCKG_TXCLK_4S_ON_W<'a, const O: u8> =
46 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
47#[doc = "Field `rfckg_adc_afifo_inv` reader - "]
48pub type RFCKG_ADC_AFIFO_INV_R = crate::BitReader<bool>;
49#[doc = "Field `rfckg_adc_afifo_inv` writer - "]
50pub type RFCKG_ADC_AFIFO_INV_W<'a, const O: u8> =
51 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
52#[doc = "Field `rfckg_adc_clkout_sel` reader - "]
53pub type RFCKG_ADC_CLKOUT_SEL_R = crate::BitReader<bool>;
54#[doc = "Field `rfckg_adc_clkout_sel` writer - "]
55pub type RFCKG_ADC_CLKOUT_SEL_W<'a, const O: u8> =
56 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
57#[doc = "Field `rfckg_dac_afifo_inv` reader - "]
58pub type RFCKG_DAC_AFIFO_INV_R = crate::BitReader<bool>;
59#[doc = "Field `rfckg_dac_afifo_inv` writer - "]
60pub type RFCKG_DAC_AFIFO_INV_W<'a, const O: u8> =
61 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
62#[doc = "Field `rx_dfe_en_4s` reader - "]
63pub type RX_DFE_EN_4S_R = crate::BitReader<bool>;
64#[doc = "Field `rx_dfe_en_4s` writer - "]
65pub type RX_DFE_EN_4S_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
66#[doc = "Field `rx_dfe_en_4s_en` reader - "]
67pub type RX_DFE_EN_4S_EN_R = crate::BitReader<bool>;
68#[doc = "Field `rx_dfe_en_4s_en` writer - "]
69pub type RX_DFE_EN_4S_EN_W<'a, const O: u8> =
70 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
71#[doc = "Field `tx_dfe_en_4s` reader - "]
72pub type TX_DFE_EN_4S_R = crate::BitReader<bool>;
73#[doc = "Field `tx_dfe_en_4s` writer - "]
74pub type TX_DFE_EN_4S_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
75#[doc = "Field `tx_dfe_en_4s_en` reader - "]
76pub type TX_DFE_EN_4S_EN_R = crate::BitReader<bool>;
77#[doc = "Field `tx_dfe_en_4s_en` writer - "]
78pub type TX_DFE_EN_4S_EN_W<'a, const O: u8> =
79 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
80#[doc = "Field `rx_test_sel` reader - "]
81pub type RX_TEST_SEL_R = crate::FieldReader<u8, u8>;
82#[doc = "Field `rx_test_sel` writer - "]
83pub type RX_TEST_SEL_W<'a, const O: u8> =
84 crate::FieldWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, u8, u8, 2, O>;
85#[doc = "Field `tx_test_sel` reader - "]
86pub type TX_TEST_SEL_R = crate::FieldReader<u8, u8>;
87#[doc = "Field `tx_test_sel` writer - "]
88pub type TX_TEST_SEL_W<'a, const O: u8> =
89 crate::FieldWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, u8, u8, 2, O>;
90#[doc = "Field `pad_adc_clkout_inv_en` reader - "]
91pub type PAD_ADC_CLKOUT_INV_EN_R = crate::BitReader<bool>;
92#[doc = "Field `pad_adc_clkout_inv_en` writer - "]
93pub type PAD_ADC_CLKOUT_INV_EN_W<'a, const O: u8> =
94 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
95#[doc = "Field `pad_dac_clkout_inv_en` reader - "]
96pub type PAD_DAC_CLKOUT_INV_EN_R = crate::BitReader<bool>;
97#[doc = "Field `pad_dac_clkout_inv_en` writer - "]
98pub type PAD_DAC_CLKOUT_INV_EN_W<'a, const O: u8> =
99 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
100#[doc = "Field `rf_ch_ind_ble_4s` reader - "]
101pub type RF_CH_IND_BLE_4S_R = crate::FieldReader<u8, u8>;
102#[doc = "Field `rf_ch_ind_ble_4s` writer - "]
103pub type RF_CH_IND_BLE_4S_W<'a, const O: u8> =
104 crate::FieldWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, u8, u8, 7, O>;
105#[doc = "Field `rf_ch_ind_ble_4s_en` reader - "]
106pub type RF_CH_IND_BLE_4S_EN_R = crate::BitReader<bool>;
107#[doc = "Field `rf_ch_ind_ble_4s_en` writer - "]
108pub type RF_CH_IND_BLE_4S_EN_W<'a, const O: u8> =
109 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
110#[doc = "Field `wifimode_4s` reader - "]
111pub type WIFIMODE_4S_R = crate::FieldReader<u8, u8>;
112#[doc = "Field `wifimode_4s` writer - "]
113pub type WIFIMODE_4S_W<'a, const O: u8> =
114 crate::FieldWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, u8, u8, 2, O>;
115#[doc = "Field `wifimode_4s_en` reader - "]
116pub type WIFIMODE_4S_EN_R = crate::BitReader<bool>;
117#[doc = "Field `wifimode_4s_en` writer - "]
118pub type WIFIMODE_4S_EN_W<'a, const O: u8> =
119 crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
120#[doc = "Field `bbmode_4s` reader - "]
121pub type BBMODE_4S_R = crate::BitReader<bool>;
122#[doc = "Field `bbmode_4s` writer - "]
123pub type BBMODE_4S_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
124#[doc = "Field `bbmode_4s_en` reader - "]
125pub type BBMODE_4S_EN_R = crate::BitReader<bool>;
126#[doc = "Field `bbmode_4s_en` writer - "]
127pub type BBMODE_4S_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, bool, O>;
128#[doc = "Field `test_sel` reader - "]
129pub type TEST_SEL_R = crate::FieldReader<u8, u8>;
130#[doc = "Field `test_sel` writer - "]
131pub type TEST_SEL_W<'a, const O: u8> =
132 crate::FieldWriter<'a, u32, RFIF_DFE_CTRL0_SPEC, u8, u8, 4, O>;
133impl R {
134 #[doc = "Bit 0"]
135 #[inline(always)]
136 pub fn rfckg_rxclk_4s_on(&self) -> RFCKG_RXCLK_4S_ON_R {
137 RFCKG_RXCLK_4S_ON_R::new((self.bits & 1) != 0)
138 }
139 #[doc = "Bit 1"]
140 #[inline(always)]
141 pub fn rfckg_txclk_4s_on(&self) -> RFCKG_TXCLK_4S_ON_R {
142 RFCKG_TXCLK_4S_ON_R::new(((self.bits >> 1) & 1) != 0)
143 }
144 #[doc = "Bit 2"]
145 #[inline(always)]
146 pub fn rfckg_adc_afifo_inv(&self) -> RFCKG_ADC_AFIFO_INV_R {
147 RFCKG_ADC_AFIFO_INV_R::new(((self.bits >> 2) & 1) != 0)
148 }
149 #[doc = "Bit 3"]
150 #[inline(always)]
151 pub fn rfckg_adc_clkout_sel(&self) -> RFCKG_ADC_CLKOUT_SEL_R {
152 RFCKG_ADC_CLKOUT_SEL_R::new(((self.bits >> 3) & 1) != 0)
153 }
154 #[doc = "Bit 4"]
155 #[inline(always)]
156 pub fn rfckg_dac_afifo_inv(&self) -> RFCKG_DAC_AFIFO_INV_R {
157 RFCKG_DAC_AFIFO_INV_R::new(((self.bits >> 4) & 1) != 0)
158 }
159 #[doc = "Bit 5"]
160 #[inline(always)]
161 pub fn rx_dfe_en_4s(&self) -> RX_DFE_EN_4S_R {
162 RX_DFE_EN_4S_R::new(((self.bits >> 5) & 1) != 0)
163 }
164 #[doc = "Bit 6"]
165 #[inline(always)]
166 pub fn rx_dfe_en_4s_en(&self) -> RX_DFE_EN_4S_EN_R {
167 RX_DFE_EN_4S_EN_R::new(((self.bits >> 6) & 1) != 0)
168 }
169 #[doc = "Bit 7"]
170 #[inline(always)]
171 pub fn tx_dfe_en_4s(&self) -> TX_DFE_EN_4S_R {
172 TX_DFE_EN_4S_R::new(((self.bits >> 7) & 1) != 0)
173 }
174 #[doc = "Bit 8"]
175 #[inline(always)]
176 pub fn tx_dfe_en_4s_en(&self) -> TX_DFE_EN_4S_EN_R {
177 TX_DFE_EN_4S_EN_R::new(((self.bits >> 8) & 1) != 0)
178 }
179 #[doc = "Bits 9:10"]
180 #[inline(always)]
181 pub fn rx_test_sel(&self) -> RX_TEST_SEL_R {
182 RX_TEST_SEL_R::new(((self.bits >> 9) & 3) as u8)
183 }
184 #[doc = "Bits 11:12"]
185 #[inline(always)]
186 pub fn tx_test_sel(&self) -> TX_TEST_SEL_R {
187 TX_TEST_SEL_R::new(((self.bits >> 11) & 3) as u8)
188 }
189 #[doc = "Bit 13"]
190 #[inline(always)]
191 pub fn pad_adc_clkout_inv_en(&self) -> PAD_ADC_CLKOUT_INV_EN_R {
192 PAD_ADC_CLKOUT_INV_EN_R::new(((self.bits >> 13) & 1) != 0)
193 }
194 #[doc = "Bit 14"]
195 #[inline(always)]
196 pub fn pad_dac_clkout_inv_en(&self) -> PAD_DAC_CLKOUT_INV_EN_R {
197 PAD_DAC_CLKOUT_INV_EN_R::new(((self.bits >> 14) & 1) != 0)
198 }
199 #[doc = "Bits 15:21"]
200 #[inline(always)]
201 pub fn rf_ch_ind_ble_4s(&self) -> RF_CH_IND_BLE_4S_R {
202 RF_CH_IND_BLE_4S_R::new(((self.bits >> 15) & 0x7f) as u8)
203 }
204 #[doc = "Bit 22"]
205 #[inline(always)]
206 pub fn rf_ch_ind_ble_4s_en(&self) -> RF_CH_IND_BLE_4S_EN_R {
207 RF_CH_IND_BLE_4S_EN_R::new(((self.bits >> 22) & 1) != 0)
208 }
209 #[doc = "Bits 23:24"]
210 #[inline(always)]
211 pub fn wifimode_4s(&self) -> WIFIMODE_4S_R {
212 WIFIMODE_4S_R::new(((self.bits >> 23) & 3) as u8)
213 }
214 #[doc = "Bit 25"]
215 #[inline(always)]
216 pub fn wifimode_4s_en(&self) -> WIFIMODE_4S_EN_R {
217 WIFIMODE_4S_EN_R::new(((self.bits >> 25) & 1) != 0)
218 }
219 #[doc = "Bit 26"]
220 #[inline(always)]
221 pub fn bbmode_4s(&self) -> BBMODE_4S_R {
222 BBMODE_4S_R::new(((self.bits >> 26) & 1) != 0)
223 }
224 #[doc = "Bit 27"]
225 #[inline(always)]
226 pub fn bbmode_4s_en(&self) -> BBMODE_4S_EN_R {
227 BBMODE_4S_EN_R::new(((self.bits >> 27) & 1) != 0)
228 }
229 #[doc = "Bits 28:31"]
230 #[inline(always)]
231 pub fn test_sel(&self) -> TEST_SEL_R {
232 TEST_SEL_R::new(((self.bits >> 28) & 0x0f) as u8)
233 }
234}
235impl W {
236 #[doc = "Bit 0"]
237 #[inline(always)]
238 #[must_use]
239 pub fn rfckg_rxclk_4s_on(&mut self) -> RFCKG_RXCLK_4S_ON_W<0> {
240 RFCKG_RXCLK_4S_ON_W::new(self)
241 }
242 #[doc = "Bit 1"]
243 #[inline(always)]
244 #[must_use]
245 pub fn rfckg_txclk_4s_on(&mut self) -> RFCKG_TXCLK_4S_ON_W<1> {
246 RFCKG_TXCLK_4S_ON_W::new(self)
247 }
248 #[doc = "Bit 2"]
249 #[inline(always)]
250 #[must_use]
251 pub fn rfckg_adc_afifo_inv(&mut self) -> RFCKG_ADC_AFIFO_INV_W<2> {
252 RFCKG_ADC_AFIFO_INV_W::new(self)
253 }
254 #[doc = "Bit 3"]
255 #[inline(always)]
256 #[must_use]
257 pub fn rfckg_adc_clkout_sel(&mut self) -> RFCKG_ADC_CLKOUT_SEL_W<3> {
258 RFCKG_ADC_CLKOUT_SEL_W::new(self)
259 }
260 #[doc = "Bit 4"]
261 #[inline(always)]
262 #[must_use]
263 pub fn rfckg_dac_afifo_inv(&mut self) -> RFCKG_DAC_AFIFO_INV_W<4> {
264 RFCKG_DAC_AFIFO_INV_W::new(self)
265 }
266 #[doc = "Bit 5"]
267 #[inline(always)]
268 #[must_use]
269 pub fn rx_dfe_en_4s(&mut self) -> RX_DFE_EN_4S_W<5> {
270 RX_DFE_EN_4S_W::new(self)
271 }
272 #[doc = "Bit 6"]
273 #[inline(always)]
274 #[must_use]
275 pub fn rx_dfe_en_4s_en(&mut self) -> RX_DFE_EN_4S_EN_W<6> {
276 RX_DFE_EN_4S_EN_W::new(self)
277 }
278 #[doc = "Bit 7"]
279 #[inline(always)]
280 #[must_use]
281 pub fn tx_dfe_en_4s(&mut self) -> TX_DFE_EN_4S_W<7> {
282 TX_DFE_EN_4S_W::new(self)
283 }
284 #[doc = "Bit 8"]
285 #[inline(always)]
286 #[must_use]
287 pub fn tx_dfe_en_4s_en(&mut self) -> TX_DFE_EN_4S_EN_W<8> {
288 TX_DFE_EN_4S_EN_W::new(self)
289 }
290 #[doc = "Bits 9:10"]
291 #[inline(always)]
292 #[must_use]
293 pub fn rx_test_sel(&mut self) -> RX_TEST_SEL_W<9> {
294 RX_TEST_SEL_W::new(self)
295 }
296 #[doc = "Bits 11:12"]
297 #[inline(always)]
298 #[must_use]
299 pub fn tx_test_sel(&mut self) -> TX_TEST_SEL_W<11> {
300 TX_TEST_SEL_W::new(self)
301 }
302 #[doc = "Bit 13"]
303 #[inline(always)]
304 #[must_use]
305 pub fn pad_adc_clkout_inv_en(&mut self) -> PAD_ADC_CLKOUT_INV_EN_W<13> {
306 PAD_ADC_CLKOUT_INV_EN_W::new(self)
307 }
308 #[doc = "Bit 14"]
309 #[inline(always)]
310 #[must_use]
311 pub fn pad_dac_clkout_inv_en(&mut self) -> PAD_DAC_CLKOUT_INV_EN_W<14> {
312 PAD_DAC_CLKOUT_INV_EN_W::new(self)
313 }
314 #[doc = "Bits 15:21"]
315 #[inline(always)]
316 #[must_use]
317 pub fn rf_ch_ind_ble_4s(&mut self) -> RF_CH_IND_BLE_4S_W<15> {
318 RF_CH_IND_BLE_4S_W::new(self)
319 }
320 #[doc = "Bit 22"]
321 #[inline(always)]
322 #[must_use]
323 pub fn rf_ch_ind_ble_4s_en(&mut self) -> RF_CH_IND_BLE_4S_EN_W<22> {
324 RF_CH_IND_BLE_4S_EN_W::new(self)
325 }
326 #[doc = "Bits 23:24"]
327 #[inline(always)]
328 #[must_use]
329 pub fn wifimode_4s(&mut self) -> WIFIMODE_4S_W<23> {
330 WIFIMODE_4S_W::new(self)
331 }
332 #[doc = "Bit 25"]
333 #[inline(always)]
334 #[must_use]
335 pub fn wifimode_4s_en(&mut self) -> WIFIMODE_4S_EN_W<25> {
336 WIFIMODE_4S_EN_W::new(self)
337 }
338 #[doc = "Bit 26"]
339 #[inline(always)]
340 #[must_use]
341 pub fn bbmode_4s(&mut self) -> BBMODE_4S_W<26> {
342 BBMODE_4S_W::new(self)
343 }
344 #[doc = "Bit 27"]
345 #[inline(always)]
346 #[must_use]
347 pub fn bbmode_4s_en(&mut self) -> BBMODE_4S_EN_W<27> {
348 BBMODE_4S_EN_W::new(self)
349 }
350 #[doc = "Bits 28:31"]
351 #[inline(always)]
352 #[must_use]
353 pub fn test_sel(&mut self) -> TEST_SEL_W<28> {
354 TEST_SEL_W::new(self)
355 }
356 #[doc = "Writes raw bits to the register."]
357 #[inline(always)]
358 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
359 self.0.bits(bits);
360 self
361 }
362}
363#[doc = "rfif_dfe_ctrl0.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfif_dfe_ctrl0](index.html) module"]
364pub struct RFIF_DFE_CTRL0_SPEC;
365impl crate::RegisterSpec for RFIF_DFE_CTRL0_SPEC {
366 type Ux = u32;
367}
368#[doc = "`read()` method returns [rfif_dfe_ctrl0::R](R) reader structure"]
369impl crate::Readable for RFIF_DFE_CTRL0_SPEC {
370 type Reader = R;
371}
372#[doc = "`write(|w| ..)` method takes [rfif_dfe_ctrl0::W](W) writer structure"]
373impl crate::Writable for RFIF_DFE_CTRL0_SPEC {
374 type Writer = W;
375 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
376 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
377}
378#[doc = "`reset()` method sets rfif_dfe_ctrl0 to value 0"]
379impl crate::Resettable for RFIF_DFE_CTRL0_SPEC {
380 const RESET_VALUE: Self::Ux = 0;
381}