bl602_pac/rf/
rfctrl_hw_en.rs1#[doc = "Register `rfctrl_hw_en` reader"]
2pub struct R(crate::R<RFCTRL_HW_EN_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<RFCTRL_HW_EN_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<RFCTRL_HW_EN_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<RFCTRL_HW_EN_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `rfctrl_hw_en` writer"]
17pub struct W(crate::W<RFCTRL_HW_EN_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<RFCTRL_HW_EN_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<RFCTRL_HW_EN_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<RFCTRL_HW_EN_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `pu_ctrl_hw` reader - "]
38pub type PU_CTRL_HW_R = crate::BitReader<bool>;
39#[doc = "Field `pu_ctrl_hw` writer - "]
40pub type PU_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
41#[doc = "Field `rx_gain_ctrl_hw` reader - "]
42pub type RX_GAIN_CTRL_HW_R = crate::BitReader<bool>;
43#[doc = "Field `rx_gain_ctrl_hw` writer - "]
44pub type RX_GAIN_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
45#[doc = "Field `tx_gain_ctrl_hw` reader - "]
46pub type TX_GAIN_CTRL_HW_R = crate::BitReader<bool>;
47#[doc = "Field `tx_gain_ctrl_hw` writer - "]
48pub type TX_GAIN_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
49#[doc = "Field `lna_ctrl_hw` reader - "]
50pub type LNA_CTRL_HW_R = crate::BitReader<bool>;
51#[doc = "Field `lna_ctrl_hw` writer - "]
52pub type LNA_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
53#[doc = "Field `rbb_bw_ctrl_hw` reader - "]
54pub type RBB_BW_CTRL_HW_R = crate::BitReader<bool>;
55#[doc = "Field `rbb_bw_ctrl_hw` writer - "]
56pub type RBB_BW_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
57#[doc = "Field `trxcal_ctrl_hw` reader - "]
58pub type TRXCAL_CTRL_HW_R = crate::BitReader<bool>;
59#[doc = "Field `trxcal_ctrl_hw` writer - "]
60pub type TRXCAL_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
61#[doc = "Field `lo_ctrl_hw` reader - "]
62pub type LO_CTRL_HW_R = crate::BitReader<bool>;
63#[doc = "Field `lo_ctrl_hw` writer - "]
64pub type LO_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
65#[doc = "Field `inc_acal_ctrl_en_hw` reader - "]
66pub type INC_ACAL_CTRL_EN_HW_R = crate::BitReader<bool>;
67#[doc = "Field `inc_acal_ctrl_en_hw` writer - "]
68pub type INC_ACAL_CTRL_EN_HW_W<'a, const O: u8> =
69 crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
70#[doc = "Field `inc_fcal_ctrl_en_hw` reader - "]
71pub type INC_FCAL_CTRL_EN_HW_R = crate::BitReader<bool>;
72#[doc = "Field `inc_fcal_ctrl_en_hw` writer - "]
73pub type INC_FCAL_CTRL_EN_HW_W<'a, const O: u8> =
74 crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
75#[doc = "Field `sdm_ctrl_hw` reader - "]
76pub type SDM_CTRL_HW_R = crate::BitReader<bool>;
77#[doc = "Field `sdm_ctrl_hw` writer - "]
78pub type SDM_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
79#[doc = "Field `rbb_pkdet_en_ctrl_hw` reader - "]
80pub type RBB_PKDET_EN_CTRL_HW_R = crate::BitReader<bool>;
81#[doc = "Field `rbb_pkdet_en_ctrl_hw` writer - "]
82pub type RBB_PKDET_EN_CTRL_HW_W<'a, const O: u8> =
83 crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
84#[doc = "Field `rbb_pkdet_out_rstn_ctrl_hw` reader - "]
85pub type RBB_PKDET_OUT_RSTN_CTRL_HW_R = crate::BitReader<bool>;
86#[doc = "Field `rbb_pkdet_out_rstn_ctrl_hw` writer - "]
87pub type RBB_PKDET_OUT_RSTN_CTRL_HW_W<'a, const O: u8> =
88 crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
89#[doc = "Field `adda_ctrl_hw` reader - "]
90pub type ADDA_CTRL_HW_R = crate::BitReader<bool>;
91#[doc = "Field `adda_ctrl_hw` writer - "]
92pub type ADDA_CTRL_HW_W<'a, const O: u8> = crate::BitWriter<'a, u32, RFCTRL_HW_EN_SPEC, bool, O>;
93impl R {
94 #[doc = "Bit 0"]
95 #[inline(always)]
96 pub fn pu_ctrl_hw(&self) -> PU_CTRL_HW_R {
97 PU_CTRL_HW_R::new((self.bits & 1) != 0)
98 }
99 #[doc = "Bit 1"]
100 #[inline(always)]
101 pub fn rx_gain_ctrl_hw(&self) -> RX_GAIN_CTRL_HW_R {
102 RX_GAIN_CTRL_HW_R::new(((self.bits >> 1) & 1) != 0)
103 }
104 #[doc = "Bit 2"]
105 #[inline(always)]
106 pub fn tx_gain_ctrl_hw(&self) -> TX_GAIN_CTRL_HW_R {
107 TX_GAIN_CTRL_HW_R::new(((self.bits >> 2) & 1) != 0)
108 }
109 #[doc = "Bit 3"]
110 #[inline(always)]
111 pub fn lna_ctrl_hw(&self) -> LNA_CTRL_HW_R {
112 LNA_CTRL_HW_R::new(((self.bits >> 3) & 1) != 0)
113 }
114 #[doc = "Bit 4"]
115 #[inline(always)]
116 pub fn rbb_bw_ctrl_hw(&self) -> RBB_BW_CTRL_HW_R {
117 RBB_BW_CTRL_HW_R::new(((self.bits >> 4) & 1) != 0)
118 }
119 #[doc = "Bit 5"]
120 #[inline(always)]
121 pub fn trxcal_ctrl_hw(&self) -> TRXCAL_CTRL_HW_R {
122 TRXCAL_CTRL_HW_R::new(((self.bits >> 5) & 1) != 0)
123 }
124 #[doc = "Bit 6"]
125 #[inline(always)]
126 pub fn lo_ctrl_hw(&self) -> LO_CTRL_HW_R {
127 LO_CTRL_HW_R::new(((self.bits >> 6) & 1) != 0)
128 }
129 #[doc = "Bit 7"]
130 #[inline(always)]
131 pub fn inc_acal_ctrl_en_hw(&self) -> INC_ACAL_CTRL_EN_HW_R {
132 INC_ACAL_CTRL_EN_HW_R::new(((self.bits >> 7) & 1) != 0)
133 }
134 #[doc = "Bit 8"]
135 #[inline(always)]
136 pub fn inc_fcal_ctrl_en_hw(&self) -> INC_FCAL_CTRL_EN_HW_R {
137 INC_FCAL_CTRL_EN_HW_R::new(((self.bits >> 8) & 1) != 0)
138 }
139 #[doc = "Bit 9"]
140 #[inline(always)]
141 pub fn sdm_ctrl_hw(&self) -> SDM_CTRL_HW_R {
142 SDM_CTRL_HW_R::new(((self.bits >> 9) & 1) != 0)
143 }
144 #[doc = "Bit 10"]
145 #[inline(always)]
146 pub fn rbb_pkdet_en_ctrl_hw(&self) -> RBB_PKDET_EN_CTRL_HW_R {
147 RBB_PKDET_EN_CTRL_HW_R::new(((self.bits >> 10) & 1) != 0)
148 }
149 #[doc = "Bit 11"]
150 #[inline(always)]
151 pub fn rbb_pkdet_out_rstn_ctrl_hw(&self) -> RBB_PKDET_OUT_RSTN_CTRL_HW_R {
152 RBB_PKDET_OUT_RSTN_CTRL_HW_R::new(((self.bits >> 11) & 1) != 0)
153 }
154 #[doc = "Bit 12"]
155 #[inline(always)]
156 pub fn adda_ctrl_hw(&self) -> ADDA_CTRL_HW_R {
157 ADDA_CTRL_HW_R::new(((self.bits >> 12) & 1) != 0)
158 }
159}
160impl W {
161 #[doc = "Bit 0"]
162 #[inline(always)]
163 #[must_use]
164 pub fn pu_ctrl_hw(&mut self) -> PU_CTRL_HW_W<0> {
165 PU_CTRL_HW_W::new(self)
166 }
167 #[doc = "Bit 1"]
168 #[inline(always)]
169 #[must_use]
170 pub fn rx_gain_ctrl_hw(&mut self) -> RX_GAIN_CTRL_HW_W<1> {
171 RX_GAIN_CTRL_HW_W::new(self)
172 }
173 #[doc = "Bit 2"]
174 #[inline(always)]
175 #[must_use]
176 pub fn tx_gain_ctrl_hw(&mut self) -> TX_GAIN_CTRL_HW_W<2> {
177 TX_GAIN_CTRL_HW_W::new(self)
178 }
179 #[doc = "Bit 3"]
180 #[inline(always)]
181 #[must_use]
182 pub fn lna_ctrl_hw(&mut self) -> LNA_CTRL_HW_W<3> {
183 LNA_CTRL_HW_W::new(self)
184 }
185 #[doc = "Bit 4"]
186 #[inline(always)]
187 #[must_use]
188 pub fn rbb_bw_ctrl_hw(&mut self) -> RBB_BW_CTRL_HW_W<4> {
189 RBB_BW_CTRL_HW_W::new(self)
190 }
191 #[doc = "Bit 5"]
192 #[inline(always)]
193 #[must_use]
194 pub fn trxcal_ctrl_hw(&mut self) -> TRXCAL_CTRL_HW_W<5> {
195 TRXCAL_CTRL_HW_W::new(self)
196 }
197 #[doc = "Bit 6"]
198 #[inline(always)]
199 #[must_use]
200 pub fn lo_ctrl_hw(&mut self) -> LO_CTRL_HW_W<6> {
201 LO_CTRL_HW_W::new(self)
202 }
203 #[doc = "Bit 7"]
204 #[inline(always)]
205 #[must_use]
206 pub fn inc_acal_ctrl_en_hw(&mut self) -> INC_ACAL_CTRL_EN_HW_W<7> {
207 INC_ACAL_CTRL_EN_HW_W::new(self)
208 }
209 #[doc = "Bit 8"]
210 #[inline(always)]
211 #[must_use]
212 pub fn inc_fcal_ctrl_en_hw(&mut self) -> INC_FCAL_CTRL_EN_HW_W<8> {
213 INC_FCAL_CTRL_EN_HW_W::new(self)
214 }
215 #[doc = "Bit 9"]
216 #[inline(always)]
217 #[must_use]
218 pub fn sdm_ctrl_hw(&mut self) -> SDM_CTRL_HW_W<9> {
219 SDM_CTRL_HW_W::new(self)
220 }
221 #[doc = "Bit 10"]
222 #[inline(always)]
223 #[must_use]
224 pub fn rbb_pkdet_en_ctrl_hw(&mut self) -> RBB_PKDET_EN_CTRL_HW_W<10> {
225 RBB_PKDET_EN_CTRL_HW_W::new(self)
226 }
227 #[doc = "Bit 11"]
228 #[inline(always)]
229 #[must_use]
230 pub fn rbb_pkdet_out_rstn_ctrl_hw(&mut self) -> RBB_PKDET_OUT_RSTN_CTRL_HW_W<11> {
231 RBB_PKDET_OUT_RSTN_CTRL_HW_W::new(self)
232 }
233 #[doc = "Bit 12"]
234 #[inline(always)]
235 #[must_use]
236 pub fn adda_ctrl_hw(&mut self) -> ADDA_CTRL_HW_W<12> {
237 ADDA_CTRL_HW_W::new(self)
238 }
239 #[doc = "Writes raw bits to the register."]
240 #[inline(always)]
241 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
242 self.0.bits(bits);
243 self
244 }
245}
246#[doc = "Control logic switch\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfctrl_hw_en](index.html) module"]
247pub struct RFCTRL_HW_EN_SPEC;
248impl crate::RegisterSpec for RFCTRL_HW_EN_SPEC {
249 type Ux = u32;
250}
251#[doc = "`read()` method returns [rfctrl_hw_en::R](R) reader structure"]
252impl crate::Readable for RFCTRL_HW_EN_SPEC {
253 type Reader = R;
254}
255#[doc = "`write(|w| ..)` method takes [rfctrl_hw_en::W](W) writer structure"]
256impl crate::Writable for RFCTRL_HW_EN_SPEC {
257 type Writer = W;
258 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
259 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
260}
261#[doc = "`reset()` method sets rfctrl_hw_en to value 0"]
262impl crate::Resettable for RFCTRL_HW_EN_SPEC {
263 const RESET_VALUE: Self::Ux = 0;
264}