bl602_pac/rf/
rf_fsm_ctrl_hw.rs1#[doc = "Register `rf_fsm_ctrl_hw` reader"]
2pub struct R(crate::R<RF_FSM_CTRL_HW_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<RF_FSM_CTRL_HW_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<RF_FSM_CTRL_HW_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<RF_FSM_CTRL_HW_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `rf_fsm_ctrl_hw` writer"]
17pub struct W(crate::W<RF_FSM_CTRL_HW_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<RF_FSM_CTRL_HW_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<RF_FSM_CTRL_HW_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<RF_FSM_CTRL_HW_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `rf_fsm_ctrl_en` reader - "]
38pub type RF_FSM_CTRL_EN_R = crate::BitReader<bool>;
39#[doc = "Field `rf_fsm_ctrl_en` writer - "]
40pub type RF_FSM_CTRL_EN_W<'a, const O: u8> =
41 crate::BitWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, bool, O>;
42#[doc = "Field `rf_fsm_t2r_cal_mode` reader - "]
43pub type RF_FSM_T2R_CAL_MODE_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `rf_fsm_t2r_cal_mode` writer - "]
45pub type RF_FSM_T2R_CAL_MODE_W<'a, const O: u8> =
46 crate::FieldWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, u8, u8, 2, O>;
47#[doc = "Field `rf_fsm_state` reader - "]
48pub type RF_FSM_STATE_R = crate::FieldReader<u8, u8>;
49#[doc = "Field `rf_fsm_state` writer - "]
50pub type RF_FSM_STATE_W<'a, const O: u8> =
51 crate::FieldWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, u8, u8, 3, O>;
52#[doc = "Field `rf_rc_state_dbg` reader - "]
53pub type RF_RC_STATE_DBG_R = crate::FieldReader<u8, u8>;
54#[doc = "Field `rf_rc_state_dbg` writer - "]
55pub type RF_RC_STATE_DBG_W<'a, const O: u8> =
56 crate::FieldWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, u8, u8, 3, O>;
57#[doc = "Field `rf_rc_state_dbg_en` reader - "]
58pub type RF_RC_STATE_DBG_EN_R = crate::BitReader<bool>;
59#[doc = "Field `rf_rc_state_dbg_en` writer - "]
60pub type RF_RC_STATE_DBG_EN_W<'a, const O: u8> =
61 crate::BitWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, bool, O>;
62#[doc = "Field `rf_fsm_st_int_sel` reader - "]
63pub type RF_FSM_ST_INT_SEL_R = crate::FieldReader<u8, u8>;
64#[doc = "Field `rf_fsm_st_int_sel` writer - "]
65pub type RF_FSM_ST_INT_SEL_W<'a, const O: u8> =
66 crate::FieldWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, u8, u8, 3, O>;
67#[doc = "Field `rf_fsm_st_int` reader - "]
68pub type RF_FSM_ST_INT_R = crate::BitReader<bool>;
69#[doc = "Field `rf_fsm_st_int` writer - "]
70pub type RF_FSM_ST_INT_W<'a, const O: u8> = crate::BitWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, bool, O>;
71#[doc = "Field `rf_fsm_st_int_clr` reader - "]
72pub type RF_FSM_ST_INT_CLR_R = crate::BitReader<bool>;
73#[doc = "Field `rf_fsm_st_int_clr` writer - "]
74pub type RF_FSM_ST_INT_CLR_W<'a, const O: u8> =
75 crate::BitWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, bool, O>;
76#[doc = "Field `rf_fsm_st_int_set` reader - "]
77pub type RF_FSM_ST_INT_SET_R = crate::BitReader<bool>;
78#[doc = "Field `rf_fsm_st_int_set` writer - "]
79pub type RF_FSM_ST_INT_SET_W<'a, const O: u8> =
80 crate::BitWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, bool, O>;
81#[doc = "Field `rf_rc_state_value` reader - "]
82pub type RF_RC_STATE_VALUE_R = crate::FieldReader<u8, u8>;
83#[doc = "Field `rf_rc_state_value` writer - "]
84pub type RF_RC_STATE_VALUE_W<'a, const O: u8> =
85 crate::FieldWriter<'a, u32, RF_FSM_CTRL_HW_SPEC, u8, u8, 3, O>;
86impl R {
87 #[doc = "Bit 1"]
88 #[inline(always)]
89 pub fn rf_fsm_ctrl_en(&self) -> RF_FSM_CTRL_EN_R {
90 RF_FSM_CTRL_EN_R::new(((self.bits >> 1) & 1) != 0)
91 }
92 #[doc = "Bits 2:3"]
93 #[inline(always)]
94 pub fn rf_fsm_t2r_cal_mode(&self) -> RF_FSM_T2R_CAL_MODE_R {
95 RF_FSM_T2R_CAL_MODE_R::new(((self.bits >> 2) & 3) as u8)
96 }
97 #[doc = "Bits 4:6"]
98 #[inline(always)]
99 pub fn rf_fsm_state(&self) -> RF_FSM_STATE_R {
100 RF_FSM_STATE_R::new(((self.bits >> 4) & 7) as u8)
101 }
102 #[doc = "Bits 8:10"]
103 #[inline(always)]
104 pub fn rf_rc_state_dbg(&self) -> RF_RC_STATE_DBG_R {
105 RF_RC_STATE_DBG_R::new(((self.bits >> 8) & 7) as u8)
106 }
107 #[doc = "Bit 11"]
108 #[inline(always)]
109 pub fn rf_rc_state_dbg_en(&self) -> RF_RC_STATE_DBG_EN_R {
110 RF_RC_STATE_DBG_EN_R::new(((self.bits >> 11) & 1) != 0)
111 }
112 #[doc = "Bits 12:14"]
113 #[inline(always)]
114 pub fn rf_fsm_st_int_sel(&self) -> RF_FSM_ST_INT_SEL_R {
115 RF_FSM_ST_INT_SEL_R::new(((self.bits >> 12) & 7) as u8)
116 }
117 #[doc = "Bit 16"]
118 #[inline(always)]
119 pub fn rf_fsm_st_int(&self) -> RF_FSM_ST_INT_R {
120 RF_FSM_ST_INT_R::new(((self.bits >> 16) & 1) != 0)
121 }
122 #[doc = "Bit 20"]
123 #[inline(always)]
124 pub fn rf_fsm_st_int_clr(&self) -> RF_FSM_ST_INT_CLR_R {
125 RF_FSM_ST_INT_CLR_R::new(((self.bits >> 20) & 1) != 0)
126 }
127 #[doc = "Bit 24"]
128 #[inline(always)]
129 pub fn rf_fsm_st_int_set(&self) -> RF_FSM_ST_INT_SET_R {
130 RF_FSM_ST_INT_SET_R::new(((self.bits >> 24) & 1) != 0)
131 }
132 #[doc = "Bits 28:30"]
133 #[inline(always)]
134 pub fn rf_rc_state_value(&self) -> RF_RC_STATE_VALUE_R {
135 RF_RC_STATE_VALUE_R::new(((self.bits >> 28) & 7) as u8)
136 }
137}
138impl W {
139 #[doc = "Bit 1"]
140 #[inline(always)]
141 #[must_use]
142 pub fn rf_fsm_ctrl_en(&mut self) -> RF_FSM_CTRL_EN_W<1> {
143 RF_FSM_CTRL_EN_W::new(self)
144 }
145 #[doc = "Bits 2:3"]
146 #[inline(always)]
147 #[must_use]
148 pub fn rf_fsm_t2r_cal_mode(&mut self) -> RF_FSM_T2R_CAL_MODE_W<2> {
149 RF_FSM_T2R_CAL_MODE_W::new(self)
150 }
151 #[doc = "Bits 4:6"]
152 #[inline(always)]
153 #[must_use]
154 pub fn rf_fsm_state(&mut self) -> RF_FSM_STATE_W<4> {
155 RF_FSM_STATE_W::new(self)
156 }
157 #[doc = "Bits 8:10"]
158 #[inline(always)]
159 #[must_use]
160 pub fn rf_rc_state_dbg(&mut self) -> RF_RC_STATE_DBG_W<8> {
161 RF_RC_STATE_DBG_W::new(self)
162 }
163 #[doc = "Bit 11"]
164 #[inline(always)]
165 #[must_use]
166 pub fn rf_rc_state_dbg_en(&mut self) -> RF_RC_STATE_DBG_EN_W<11> {
167 RF_RC_STATE_DBG_EN_W::new(self)
168 }
169 #[doc = "Bits 12:14"]
170 #[inline(always)]
171 #[must_use]
172 pub fn rf_fsm_st_int_sel(&mut self) -> RF_FSM_ST_INT_SEL_W<12> {
173 RF_FSM_ST_INT_SEL_W::new(self)
174 }
175 #[doc = "Bit 16"]
176 #[inline(always)]
177 #[must_use]
178 pub fn rf_fsm_st_int(&mut self) -> RF_FSM_ST_INT_W<16> {
179 RF_FSM_ST_INT_W::new(self)
180 }
181 #[doc = "Bit 20"]
182 #[inline(always)]
183 #[must_use]
184 pub fn rf_fsm_st_int_clr(&mut self) -> RF_FSM_ST_INT_CLR_W<20> {
185 RF_FSM_ST_INT_CLR_W::new(self)
186 }
187 #[doc = "Bit 24"]
188 #[inline(always)]
189 #[must_use]
190 pub fn rf_fsm_st_int_set(&mut self) -> RF_FSM_ST_INT_SET_W<24> {
191 RF_FSM_ST_INT_SET_W::new(self)
192 }
193 #[doc = "Bits 28:30"]
194 #[inline(always)]
195 #[must_use]
196 pub fn rf_rc_state_value(&mut self) -> RF_RC_STATE_VALUE_W<28> {
197 RF_RC_STATE_VALUE_W::new(self)
198 }
199 #[doc = "Writes raw bits to the register."]
200 #[inline(always)]
201 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
202 self.0.bits(bits);
203 self
204 }
205}
206#[doc = "Digital Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rf_fsm_ctrl_hw](index.html) module"]
207pub struct RF_FSM_CTRL_HW_SPEC;
208impl crate::RegisterSpec for RF_FSM_CTRL_HW_SPEC {
209 type Ux = u32;
210}
211#[doc = "`read()` method returns [rf_fsm_ctrl_hw::R](R) reader structure"]
212impl crate::Readable for RF_FSM_CTRL_HW_SPEC {
213 type Reader = R;
214}
215#[doc = "`write(|w| ..)` method takes [rf_fsm_ctrl_hw::W](W) writer structure"]
216impl crate::Writable for RF_FSM_CTRL_HW_SPEC {
217 type Writer = W;
218 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
219 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
220}
221#[doc = "`reset()` method sets rf_fsm_ctrl_hw to value 0"]
222impl crate::Resettable for RF_FSM_CTRL_HW_SPEC {
223 const RESET_VALUE: Self::Ux = 0;
224}