bl602_pac/rf/
pa_reg_ctrl_hw1.rs

1#[doc = "Register `pa_reg_ctrl_hw1` reader"]
2pub struct R(crate::R<PA_REG_CTRL_HW1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PA_REG_CTRL_HW1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PA_REG_CTRL_HW1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PA_REG_CTRL_HW1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `pa_reg_ctrl_hw1` writer"]
17pub struct W(crate::W<PA_REG_CTRL_HW1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PA_REG_CTRL_HW1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PA_REG_CTRL_HW1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PA_REG_CTRL_HW1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `pa_iet_11n` reader - "]
38pub type PA_IET_11N_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `pa_iet_11n` writer - "]
40pub type PA_IET_11N_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, PA_REG_CTRL_HW1_SPEC, u8, u8, 4, O>;
42#[doc = "Field `pa_vbcore_11n` reader - "]
43pub type PA_VBCORE_11N_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `pa_vbcore_11n` writer - "]
45pub type PA_VBCORE_11N_W<'a, const O: u8> =
46    crate::FieldWriter<'a, u32, PA_REG_CTRL_HW1_SPEC, u8, u8, 4, O>;
47#[doc = "Field `pa_vbcas_11n` reader - "]
48pub type PA_VBCAS_11N_R = crate::FieldReader<u8, u8>;
49#[doc = "Field `pa_vbcas_11n` writer - "]
50pub type PA_VBCAS_11N_W<'a, const O: u8> =
51    crate::FieldWriter<'a, u32, PA_REG_CTRL_HW1_SPEC, u8, u8, 3, O>;
52impl R {
53    #[doc = "Bits 12:15"]
54    #[inline(always)]
55    pub fn pa_iet_11n(&self) -> PA_IET_11N_R {
56        PA_IET_11N_R::new(((self.bits >> 12) & 0x0f) as u8)
57    }
58    #[doc = "Bits 16:19"]
59    #[inline(always)]
60    pub fn pa_vbcore_11n(&self) -> PA_VBCORE_11N_R {
61        PA_VBCORE_11N_R::new(((self.bits >> 16) & 0x0f) as u8)
62    }
63    #[doc = "Bits 20:22"]
64    #[inline(always)]
65    pub fn pa_vbcas_11n(&self) -> PA_VBCAS_11N_R {
66        PA_VBCAS_11N_R::new(((self.bits >> 20) & 7) as u8)
67    }
68}
69impl W {
70    #[doc = "Bits 12:15"]
71    #[inline(always)]
72    #[must_use]
73    pub fn pa_iet_11n(&mut self) -> PA_IET_11N_W<12> {
74        PA_IET_11N_W::new(self)
75    }
76    #[doc = "Bits 16:19"]
77    #[inline(always)]
78    #[must_use]
79    pub fn pa_vbcore_11n(&mut self) -> PA_VBCORE_11N_W<16> {
80        PA_VBCORE_11N_W::new(self)
81    }
82    #[doc = "Bits 20:22"]
83    #[inline(always)]
84    #[must_use]
85    pub fn pa_vbcas_11n(&mut self) -> PA_VBCAS_11N_W<20> {
86        PA_VBCAS_11N_W::new(self)
87    }
88    #[doc = "Writes raw bits to the register."]
89    #[inline(always)]
90    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
91        self.0.bits(bits);
92        self
93    }
94}
95#[doc = "pa_reg_ctrl_hw1.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pa_reg_ctrl_hw1](index.html) module"]
96pub struct PA_REG_CTRL_HW1_SPEC;
97impl crate::RegisterSpec for PA_REG_CTRL_HW1_SPEC {
98    type Ux = u32;
99}
100#[doc = "`read()` method returns [pa_reg_ctrl_hw1::R](R) reader structure"]
101impl crate::Readable for PA_REG_CTRL_HW1_SPEC {
102    type Reader = R;
103}
104#[doc = "`write(|w| ..)` method takes [pa_reg_ctrl_hw1::W](W) writer structure"]
105impl crate::Writable for PA_REG_CTRL_HW1_SPEC {
106    type Writer = W;
107    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
108    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
109}
110#[doc = "`reset()` method sets pa_reg_ctrl_hw1 to value 0"]
111impl crate::Resettable for PA_REG_CTRL_HW1_SPEC {
112    const RESET_VALUE: Self::Ux = 0;
113}
bl602_pac/rf/pa_reg_ctrl_hw1.rs

bl602_pac/rf/
pa_reg_ctrl_hw1.rs
