bl602_pac/pds/
pds_ctl.rs

1#[doc = "Register `PDS_CTL` reader"]
2pub struct R(crate::R<PDS_CTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PDS_CTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PDS_CTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PDS_CTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PDS_CTL` writer"]
17pub struct W(crate::W<PDS_CTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PDS_CTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PDS_CTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PDS_CTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `pds_start_ps` reader - "]
38pub type PDS_START_PS_R = crate::BitReader<bool>;
39#[doc = "Field `pds_start_ps` writer - "]
40pub type PDS_START_PS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
41#[doc = "Field `cr_sleep_forever` reader - "]
42pub type CR_SLEEP_FOREVER_R = crate::BitReader<bool>;
43#[doc = "Field `cr_sleep_forever` writer - "]
44pub type CR_SLEEP_FOREVER_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
45#[doc = "Field `cr_xtal_force_off` reader - "]
46pub type CR_XTAL_FORCE_OFF_R = crate::BitReader<bool>;
47#[doc = "Field `cr_xtal_force_off` writer - "]
48pub type CR_XTAL_FORCE_OFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
49#[doc = "Field `cr_wifi_pds_save_state` reader - "]
50pub type CR_WIFI_PDS_SAVE_STATE_R = crate::BitReader<bool>;
51#[doc = "Field `cr_wifi_pds_save_state` writer - "]
52pub type CR_WIFI_PDS_SAVE_STATE_W<'a, const O: u8> =
53    crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
54#[doc = "Field `cr_pds_pd_dcdc18` reader - "]
55pub type CR_PDS_PD_DCDC18_R = crate::BitReader<bool>;
56#[doc = "Field `cr_pds_pd_dcdc18` writer - "]
57pub type CR_PDS_PD_DCDC18_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
58#[doc = "Field `cr_pds_pd_bg_sys` reader - "]
59pub type CR_PDS_PD_BG_SYS_R = crate::BitReader<bool>;
60#[doc = "Field `cr_pds_pd_bg_sys` writer - "]
61pub type CR_PDS_PD_BG_SYS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
62#[doc = "Field `cr_pds_gate_clk` reader - "]
63pub type CR_PDS_GATE_CLK_R = crate::BitReader<bool>;
64#[doc = "Field `cr_pds_gate_clk` writer - "]
65pub type CR_PDS_GATE_CLK_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
66#[doc = "Field `cr_pds_mem_stby` reader - "]
67pub type CR_PDS_MEM_STBY_R = crate::BitReader<bool>;
68#[doc = "Field `cr_pds_mem_stby` writer - "]
69pub type CR_PDS_MEM_STBY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
70#[doc = "Field `cr_pds_iso_en` reader - "]
71pub type CR_PDS_ISO_EN_R = crate::BitReader<bool>;
72#[doc = "Field `cr_pds_iso_en` writer - "]
73pub type CR_PDS_ISO_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
74#[doc = "Field `cr_pds_wait_xtal_rdy` reader - "]
75pub type CR_PDS_WAIT_XTAL_RDY_R = crate::BitReader<bool>;
76#[doc = "Field `cr_pds_wait_xtal_rdy` writer - "]
77pub type CR_PDS_WAIT_XTAL_RDY_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
78#[doc = "Field `cr_pds_pwr_off` reader - "]
79pub type CR_PDS_PWR_OFF_R = crate::BitReader<bool>;
80#[doc = "Field `cr_pds_pwr_off` writer - "]
81pub type CR_PDS_PWR_OFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
82#[doc = "Field `cr_pds_pd_xtal` reader - "]
83pub type CR_PDS_PD_XTAL_R = crate::BitReader<bool>;
84#[doc = "Field `cr_pds_pd_xtal` writer - "]
85pub type CR_PDS_PD_XTAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
86#[doc = "Field `cr_pds_soc_enb_force_on` reader - "]
87pub type CR_PDS_SOC_ENB_FORCE_ON_R = crate::BitReader<bool>;
88#[doc = "Field `cr_pds_soc_enb_force_on` writer - "]
89pub type CR_PDS_SOC_ENB_FORCE_ON_W<'a, const O: u8> =
90    crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
91#[doc = "Field `cr_pds_rst_soc_en` reader - "]
92pub type CR_PDS_RST_SOC_EN_R = crate::BitReader<bool>;
93#[doc = "Field `cr_pds_rst_soc_en` writer - "]
94pub type CR_PDS_RST_SOC_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
95#[doc = "Field `cr_pds_rc32m_off_dis` reader - "]
96pub type CR_PDS_RC32M_OFF_DIS_R = crate::BitReader<bool>;
97#[doc = "Field `cr_pds_rc32m_off_dis` writer - "]
98pub type CR_PDS_RC32M_OFF_DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
99#[doc = "Field `cr_pds_ldo_vsel_en` reader - "]
100pub type CR_PDS_LDO_VSEL_EN_R = crate::BitReader<bool>;
101#[doc = "Field `cr_pds_ldo_vsel_en` writer - "]
102pub type CR_PDS_LDO_VSEL_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
103#[doc = "Field `cr_np_wfi_mask` reader - "]
104pub type CR_NP_WFI_MASK_R = crate::BitReader<bool>;
105#[doc = "Field `cr_np_wfi_mask` writer - "]
106pub type CR_NP_WFI_MASK_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
107#[doc = "Field `cr_pds_pd_ldo11` reader - "]
108pub type CR_PDS_PD_LDO11_R = crate::BitReader<bool>;
109#[doc = "Field `cr_pds_pd_ldo11` writer - "]
110pub type CR_PDS_PD_LDO11_W<'a, const O: u8> = crate::BitWriter<'a, u32, PDS_CTL_SPEC, bool, O>;
111#[doc = "Field `cr_pds_ldo_vol` reader - "]
112pub type CR_PDS_LDO_VOL_R = crate::FieldReader<u8, u8>;
113#[doc = "Field `cr_pds_ldo_vol` writer - "]
114pub type CR_PDS_LDO_VOL_W<'a, const O: u8> =
115    crate::FieldWriter<'a, u32, PDS_CTL_SPEC, u8, u8, 4, O>;
116#[doc = "Field `cr_pds_ctrl_rf` reader - "]
117pub type CR_PDS_CTRL_RF_R = crate::FieldReader<u8, u8>;
118#[doc = "Field `cr_pds_ctrl_rf` writer - "]
119pub type CR_PDS_CTRL_RF_W<'a, const O: u8> =
120    crate::FieldWriter<'a, u32, PDS_CTL_SPEC, u8, u8, 2, O>;
121#[doc = "Field `cr_pds_ctrl_pll` reader - "]
122pub type CR_PDS_CTRL_PLL_R = crate::FieldReader<u8, u8>;
123#[doc = "Field `cr_pds_ctrl_pll` writer - "]
124pub type CR_PDS_CTRL_PLL_W<'a, const O: u8> =
125    crate::FieldWriter<'a, u32, PDS_CTL_SPEC, u8, u8, 2, O>;
126impl R {
127    #[doc = "Bit 0"]
128    #[inline(always)]
129    pub fn pds_start_ps(&self) -> PDS_START_PS_R {
130        PDS_START_PS_R::new((self.bits & 1) != 0)
131    }
132    #[doc = "Bit 1"]
133    #[inline(always)]
134    pub fn cr_sleep_forever(&self) -> CR_SLEEP_FOREVER_R {
135        CR_SLEEP_FOREVER_R::new(((self.bits >> 1) & 1) != 0)
136    }
137    #[doc = "Bit 2"]
138    #[inline(always)]
139    pub fn cr_xtal_force_off(&self) -> CR_XTAL_FORCE_OFF_R {
140        CR_XTAL_FORCE_OFF_R::new(((self.bits >> 2) & 1) != 0)
141    }
142    #[doc = "Bit 3"]
143    #[inline(always)]
144    pub fn cr_wifi_pds_save_state(&self) -> CR_WIFI_PDS_SAVE_STATE_R {
145        CR_WIFI_PDS_SAVE_STATE_R::new(((self.bits >> 3) & 1) != 0)
146    }
147    #[doc = "Bit 4"]
148    #[inline(always)]
149    pub fn cr_pds_pd_dcdc18(&self) -> CR_PDS_PD_DCDC18_R {
150        CR_PDS_PD_DCDC18_R::new(((self.bits >> 4) & 1) != 0)
151    }
152    #[doc = "Bit 5"]
153    #[inline(always)]
154    pub fn cr_pds_pd_bg_sys(&self) -> CR_PDS_PD_BG_SYS_R {
155        CR_PDS_PD_BG_SYS_R::new(((self.bits >> 5) & 1) != 0)
156    }
157    #[doc = "Bit 8"]
158    #[inline(always)]
159    pub fn cr_pds_gate_clk(&self) -> CR_PDS_GATE_CLK_R {
160        CR_PDS_GATE_CLK_R::new(((self.bits >> 8) & 1) != 0)
161    }
162    #[doc = "Bit 9"]
163    #[inline(always)]
164    pub fn cr_pds_mem_stby(&self) -> CR_PDS_MEM_STBY_R {
165        CR_PDS_MEM_STBY_R::new(((self.bits >> 9) & 1) != 0)
166    }
167    #[doc = "Bit 11"]
168    #[inline(always)]
169    pub fn cr_pds_iso_en(&self) -> CR_PDS_ISO_EN_R {
170        CR_PDS_ISO_EN_R::new(((self.bits >> 11) & 1) != 0)
171    }
172    #[doc = "Bit 12"]
173    #[inline(always)]
174    pub fn cr_pds_wait_xtal_rdy(&self) -> CR_PDS_WAIT_XTAL_RDY_R {
175        CR_PDS_WAIT_XTAL_RDY_R::new(((self.bits >> 12) & 1) != 0)
176    }
177    #[doc = "Bit 13"]
178    #[inline(always)]
179    pub fn cr_pds_pwr_off(&self) -> CR_PDS_PWR_OFF_R {
180        CR_PDS_PWR_OFF_R::new(((self.bits >> 13) & 1) != 0)
181    }
182    #[doc = "Bit 14"]
183    #[inline(always)]
184    pub fn cr_pds_pd_xtal(&self) -> CR_PDS_PD_XTAL_R {
185        CR_PDS_PD_XTAL_R::new(((self.bits >> 14) & 1) != 0)
186    }
187    #[doc = "Bit 15"]
188    #[inline(always)]
189    pub fn cr_pds_soc_enb_force_on(&self) -> CR_PDS_SOC_ENB_FORCE_ON_R {
190        CR_PDS_SOC_ENB_FORCE_ON_R::new(((self.bits >> 15) & 1) != 0)
191    }
192    #[doc = "Bit 16"]
193    #[inline(always)]
194    pub fn cr_pds_rst_soc_en(&self) -> CR_PDS_RST_SOC_EN_R {
195        CR_PDS_RST_SOC_EN_R::new(((self.bits >> 16) & 1) != 0)
196    }
197    #[doc = "Bit 17"]
198    #[inline(always)]
199    pub fn cr_pds_rc32m_off_dis(&self) -> CR_PDS_RC32M_OFF_DIS_R {
200        CR_PDS_RC32M_OFF_DIS_R::new(((self.bits >> 17) & 1) != 0)
201    }
202    #[doc = "Bit 18"]
203    #[inline(always)]
204    pub fn cr_pds_ldo_vsel_en(&self) -> CR_PDS_LDO_VSEL_EN_R {
205        CR_PDS_LDO_VSEL_EN_R::new(((self.bits >> 18) & 1) != 0)
206    }
207    #[doc = "Bit 21"]
208    #[inline(always)]
209    pub fn cr_np_wfi_mask(&self) -> CR_NP_WFI_MASK_R {
210        CR_NP_WFI_MASK_R::new(((self.bits >> 21) & 1) != 0)
211    }
212    #[doc = "Bit 22"]
213    #[inline(always)]
214    pub fn cr_pds_pd_ldo11(&self) -> CR_PDS_PD_LDO11_R {
215        CR_PDS_PD_LDO11_R::new(((self.bits >> 22) & 1) != 0)
216    }
217    #[doc = "Bits 24:27"]
218    #[inline(always)]
219    pub fn cr_pds_ldo_vol(&self) -> CR_PDS_LDO_VOL_R {
220        CR_PDS_LDO_VOL_R::new(((self.bits >> 24) & 0x0f) as u8)
221    }
222    #[doc = "Bits 28:29"]
223    #[inline(always)]
224    pub fn cr_pds_ctrl_rf(&self) -> CR_PDS_CTRL_RF_R {
225        CR_PDS_CTRL_RF_R::new(((self.bits >> 28) & 3) as u8)
226    }
227    #[doc = "Bits 30:31"]
228    #[inline(always)]
229    pub fn cr_pds_ctrl_pll(&self) -> CR_PDS_CTRL_PLL_R {
230        CR_PDS_CTRL_PLL_R::new(((self.bits >> 30) & 3) as u8)
231    }
232}
233impl W {
234    #[doc = "Bit 0"]
235    #[inline(always)]
236    #[must_use]
237    pub fn pds_start_ps(&mut self) -> PDS_START_PS_W<0> {
238        PDS_START_PS_W::new(self)
239    }
240    #[doc = "Bit 1"]
241    #[inline(always)]
242    #[must_use]
243    pub fn cr_sleep_forever(&mut self) -> CR_SLEEP_FOREVER_W<1> {
244        CR_SLEEP_FOREVER_W::new(self)
245    }
246    #[doc = "Bit 2"]
247    #[inline(always)]
248    #[must_use]
249    pub fn cr_xtal_force_off(&mut self) -> CR_XTAL_FORCE_OFF_W<2> {
250        CR_XTAL_FORCE_OFF_W::new(self)
251    }
252    #[doc = "Bit 3"]
253    #[inline(always)]
254    #[must_use]
255    pub fn cr_wifi_pds_save_state(&mut self) -> CR_WIFI_PDS_SAVE_STATE_W<3> {
256        CR_WIFI_PDS_SAVE_STATE_W::new(self)
257    }
258    #[doc = "Bit 4"]
259    #[inline(always)]
260    #[must_use]
261    pub fn cr_pds_pd_dcdc18(&mut self) -> CR_PDS_PD_DCDC18_W<4> {
262        CR_PDS_PD_DCDC18_W::new(self)
263    }
264    #[doc = "Bit 5"]
265    #[inline(always)]
266    #[must_use]
267    pub fn cr_pds_pd_bg_sys(&mut self) -> CR_PDS_PD_BG_SYS_W<5> {
268        CR_PDS_PD_BG_SYS_W::new(self)
269    }
270    #[doc = "Bit 8"]
271    #[inline(always)]
272    #[must_use]
273    pub fn cr_pds_gate_clk(&mut self) -> CR_PDS_GATE_CLK_W<8> {
274        CR_PDS_GATE_CLK_W::new(self)
275    }
276    #[doc = "Bit 9"]
277    #[inline(always)]
278    #[must_use]
279    pub fn cr_pds_mem_stby(&mut self) -> CR_PDS_MEM_STBY_W<9> {
280        CR_PDS_MEM_STBY_W::new(self)
281    }
282    #[doc = "Bit 11"]
283    #[inline(always)]
284    #[must_use]
285    pub fn cr_pds_iso_en(&mut self) -> CR_PDS_ISO_EN_W<11> {
286        CR_PDS_ISO_EN_W::new(self)
287    }
288    #[doc = "Bit 12"]
289    #[inline(always)]
290    #[must_use]
291    pub fn cr_pds_wait_xtal_rdy(&mut self) -> CR_PDS_WAIT_XTAL_RDY_W<12> {
292        CR_PDS_WAIT_XTAL_RDY_W::new(self)
293    }
294    #[doc = "Bit 13"]
295    #[inline(always)]
296    #[must_use]
297    pub fn cr_pds_pwr_off(&mut self) -> CR_PDS_PWR_OFF_W<13> {
298        CR_PDS_PWR_OFF_W::new(self)
299    }
300    #[doc = "Bit 14"]
301    #[inline(always)]
302    #[must_use]
303    pub fn cr_pds_pd_xtal(&mut self) -> CR_PDS_PD_XTAL_W<14> {
304        CR_PDS_PD_XTAL_W::new(self)
305    }
306    #[doc = "Bit 15"]
307    #[inline(always)]
308    #[must_use]
309    pub fn cr_pds_soc_enb_force_on(&mut self) -> CR_PDS_SOC_ENB_FORCE_ON_W<15> {
310        CR_PDS_SOC_ENB_FORCE_ON_W::new(self)
311    }
312    #[doc = "Bit 16"]
313    #[inline(always)]
314    #[must_use]
315    pub fn cr_pds_rst_soc_en(&mut self) -> CR_PDS_RST_SOC_EN_W<16> {
316        CR_PDS_RST_SOC_EN_W::new(self)
317    }
318    #[doc = "Bit 17"]
319    #[inline(always)]
320    #[must_use]
321    pub fn cr_pds_rc32m_off_dis(&mut self) -> CR_PDS_RC32M_OFF_DIS_W<17> {
322        CR_PDS_RC32M_OFF_DIS_W::new(self)
323    }
324    #[doc = "Bit 18"]
325    #[inline(always)]
326    #[must_use]
327    pub fn cr_pds_ldo_vsel_en(&mut self) -> CR_PDS_LDO_VSEL_EN_W<18> {
328        CR_PDS_LDO_VSEL_EN_W::new(self)
329    }
330    #[doc = "Bit 21"]
331    #[inline(always)]
332    #[must_use]
333    pub fn cr_np_wfi_mask(&mut self) -> CR_NP_WFI_MASK_W<21> {
334        CR_NP_WFI_MASK_W::new(self)
335    }
336    #[doc = "Bit 22"]
337    #[inline(always)]
338    #[must_use]
339    pub fn cr_pds_pd_ldo11(&mut self) -> CR_PDS_PD_LDO11_W<22> {
340        CR_PDS_PD_LDO11_W::new(self)
341    }
342    #[doc = "Bits 24:27"]
343    #[inline(always)]
344    #[must_use]
345    pub fn cr_pds_ldo_vol(&mut self) -> CR_PDS_LDO_VOL_W<24> {
346        CR_PDS_LDO_VOL_W::new(self)
347    }
348    #[doc = "Bits 28:29"]
349    #[inline(always)]
350    #[must_use]
351    pub fn cr_pds_ctrl_rf(&mut self) -> CR_PDS_CTRL_RF_W<28> {
352        CR_PDS_CTRL_RF_W::new(self)
353    }
354    #[doc = "Bits 30:31"]
355    #[inline(always)]
356    #[must_use]
357    pub fn cr_pds_ctrl_pll(&mut self) -> CR_PDS_CTRL_PLL_W<30> {
358        CR_PDS_CTRL_PLL_W::new(self)
359    }
360    #[doc = "Writes raw bits to the register."]
361    #[inline(always)]
362    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
363        self.0.bits(bits);
364        self
365    }
366}
367#[doc = "PDS_CTL.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pds_ctl](index.html) module"]
368pub struct PDS_CTL_SPEC;
369impl crate::RegisterSpec for PDS_CTL_SPEC {
370    type Ux = u32;
371}
372#[doc = "`read()` method returns [pds_ctl::R](R) reader structure"]
373impl crate::Readable for PDS_CTL_SPEC {
374    type Reader = R;
375}
376#[doc = "`write(|w| ..)` method takes [pds_ctl::W](W) writer structure"]
377impl crate::Writable for PDS_CTL_SPEC {
378    type Writer = W;
379    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
380    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
381}
382#[doc = "`reset()` method sets PDS_CTL to value 0x1a00_6b00"]
383impl crate::Resettable for PDS_CTL_SPEC {
384    const RESET_VALUE: Self::Ux = 0x1a00_6b00;
385}