bl602_pac/dma/
dma_c0control.rs

1#[doc = "Register `DMA_C0Control` reader"]
2pub struct R(crate::R<DMA_C0CONTROL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMA_C0CONTROL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMA_C0CONTROL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMA_C0CONTROL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DMA_C0Control` writer"]
17pub struct W(crate::W<DMA_C0CONTROL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DMA_C0CONTROL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DMA_C0CONTROL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DMA_C0CONTROL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TransferSize` reader - "]
38pub type TRANSFER_SIZE_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `TransferSize` writer - "]
40pub type TRANSFER_SIZE_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u16, u16, 12, O>;
42#[doc = "Field `SBSize` reader - "]
43pub type SBSIZE_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `SBSize` writer - "]
45pub type SBSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 3, O>;
46#[doc = "Field `DBSize` reader - "]
47pub type DBSIZE_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `DBSize` writer - "]
49pub type DBSIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 3, O>;
50#[doc = "Field `SWidth` reader - "]
51pub type SWIDTH_R = crate::FieldReader<u8, u8>;
52#[doc = "Field `SWidth` writer - "]
53pub type SWIDTH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 3, O>;
54#[doc = "Field `DWidth` reader - "]
55pub type DWIDTH_R = crate::FieldReader<u8, u8>;
56#[doc = "Field `DWidth` writer - "]
57pub type DWIDTH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 3, O>;
58#[doc = "Field `SLargerD` reader - "]
59pub type SLARGER_D_R = crate::BitReader<bool>;
60#[doc = "Field `SLargerD` writer - "]
61pub type SLARGER_D_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
62#[doc = "Field `SI` reader - "]
63pub type SI_R = crate::BitReader<bool>;
64#[doc = "Field `SI` writer - "]
65pub type SI_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
66#[doc = "Field `DI` reader - "]
67pub type DI_R = crate::BitReader<bool>;
68#[doc = "Field `DI` writer - "]
69pub type DI_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
70#[doc = "Field `Prot` reader - "]
71pub type PROT_R = crate::FieldReader<u8, u8>;
72#[doc = "Field `Prot` writer - "]
73pub type PROT_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DMA_C0CONTROL_SPEC, u8, u8, 3, O>;
74#[doc = "Field `I` reader - "]
75pub type I_R = crate::BitReader<bool>;
76#[doc = "Field `I` writer - "]
77pub type I_W<'a, const O: u8> = crate::BitWriter<'a, u32, DMA_C0CONTROL_SPEC, bool, O>;
78impl R {
79    #[doc = "Bits 0:11"]
80    #[inline(always)]
81    pub fn transfer_size(&self) -> TRANSFER_SIZE_R {
82        TRANSFER_SIZE_R::new((self.bits & 0x0fff) as u16)
83    }
84    #[doc = "Bits 12:14"]
85    #[inline(always)]
86    pub fn sbsize(&self) -> SBSIZE_R {
87        SBSIZE_R::new(((self.bits >> 12) & 7) as u8)
88    }
89    #[doc = "Bits 15:17"]
90    #[inline(always)]
91    pub fn dbsize(&self) -> DBSIZE_R {
92        DBSIZE_R::new(((self.bits >> 15) & 7) as u8)
93    }
94    #[doc = "Bits 18:20"]
95    #[inline(always)]
96    pub fn swidth(&self) -> SWIDTH_R {
97        SWIDTH_R::new(((self.bits >> 18) & 7) as u8)
98    }
99    #[doc = "Bits 21:23"]
100    #[inline(always)]
101    pub fn dwidth(&self) -> DWIDTH_R {
102        DWIDTH_R::new(((self.bits >> 21) & 7) as u8)
103    }
104    #[doc = "Bit 24"]
105    #[inline(always)]
106    pub fn slarger_d(&self) -> SLARGER_D_R {
107        SLARGER_D_R::new(((self.bits >> 24) & 1) != 0)
108    }
109    #[doc = "Bit 26"]
110    #[inline(always)]
111    pub fn si(&self) -> SI_R {
112        SI_R::new(((self.bits >> 26) & 1) != 0)
113    }
114    #[doc = "Bit 27"]
115    #[inline(always)]
116    pub fn di(&self) -> DI_R {
117        DI_R::new(((self.bits >> 27) & 1) != 0)
118    }
119    #[doc = "Bits 28:30"]
120    #[inline(always)]
121    pub fn prot(&self) -> PROT_R {
122        PROT_R::new(((self.bits >> 28) & 7) as u8)
123    }
124    #[doc = "Bit 31"]
125    #[inline(always)]
126    pub fn i(&self) -> I_R {
127        I_R::new(((self.bits >> 31) & 1) != 0)
128    }
129}
130impl W {
131    #[doc = "Bits 0:11"]
132    #[inline(always)]
133    #[must_use]
134    pub fn transfer_size(&mut self) -> TRANSFER_SIZE_W<0> {
135        TRANSFER_SIZE_W::new(self)
136    }
137    #[doc = "Bits 12:14"]
138    #[inline(always)]
139    #[must_use]
140    pub fn sbsize(&mut self) -> SBSIZE_W<12> {
141        SBSIZE_W::new(self)
142    }
143    #[doc = "Bits 15:17"]
144    #[inline(always)]
145    #[must_use]
146    pub fn dbsize(&mut self) -> DBSIZE_W<15> {
147        DBSIZE_W::new(self)
148    }
149    #[doc = "Bits 18:20"]
150    #[inline(always)]
151    #[must_use]
152    pub fn swidth(&mut self) -> SWIDTH_W<18> {
153        SWIDTH_W::new(self)
154    }
155    #[doc = "Bits 21:23"]
156    #[inline(always)]
157    #[must_use]
158    pub fn dwidth(&mut self) -> DWIDTH_W<21> {
159        DWIDTH_W::new(self)
160    }
161    #[doc = "Bit 24"]
162    #[inline(always)]
163    #[must_use]
164    pub fn slarger_d(&mut self) -> SLARGER_D_W<24> {
165        SLARGER_D_W::new(self)
166    }
167    #[doc = "Bit 26"]
168    #[inline(always)]
169    #[must_use]
170    pub fn si(&mut self) -> SI_W<26> {
171        SI_W::new(self)
172    }
173    #[doc = "Bit 27"]
174    #[inline(always)]
175    #[must_use]
176    pub fn di(&mut self) -> DI_W<27> {
177        DI_W::new(self)
178    }
179    #[doc = "Bits 28:30"]
180    #[inline(always)]
181    #[must_use]
182    pub fn prot(&mut self) -> PROT_W<28> {
183        PROT_W::new(self)
184    }
185    #[doc = "Bit 31"]
186    #[inline(always)]
187    #[must_use]
188    pub fn i(&mut self) -> I_W<31> {
189        I_W::new(self)
190    }
191    #[doc = "Writes raw bits to the register."]
192    #[inline(always)]
193    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
194        self.0.bits(bits);
195        self
196    }
197}
198#[doc = "DMA_C0Control.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_c0control](index.html) module"]
199pub struct DMA_C0CONTROL_SPEC;
200impl crate::RegisterSpec for DMA_C0CONTROL_SPEC {
201    type Ux = u32;
202}
203#[doc = "`read()` method returns [dma_c0control::R](R) reader structure"]
204impl crate::Readable for DMA_C0CONTROL_SPEC {
205    type Reader = R;
206}
207#[doc = "`write(|w| ..)` method takes [dma_c0control::W](W) writer structure"]
208impl crate::Writable for DMA_C0CONTROL_SPEC {
209    type Writer = W;
210    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
211    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
212}
213#[doc = "`reset()` method sets DMA_C0Control to value 0x0c48_9000"]
214impl crate::Resettable for DMA_C0CONTROL_SPEC {
215    const RESET_VALUE: Self::Ux = 0x0c48_9000;
216}
bl602_pac/dma/dma_c0control.rs

bl602_pac/dma/
dma_c0control.rs
