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Crate bitloom_sim

Crate bitloom_sim 

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Cycle-accurate simulation over FrozenHir (AD-5, AD-15, AD-17).

Structs§

Coverage
Toggle coverage over named ports/regs sampled each tick.
PortMismatch
One named port that differed between two views.
Sim
Simulator state for one FrozenHir circuit.
Values
Port-level values shared by tick and functional models (AD-17).

Enums§

EquivStatus
Result of a bounded functional ↔ tick equivalence run.
FstError
TickEngine
Select how Sim::tick evaluates FrozenHir.

Traits§

AbstractionView
A handwritten abstraction/bridge cycle (FR29). Compared only via PortValues.

Functions§

check_functional_equiv
Drive the same stimulus on FrozenHir tick and a handwritten view. Consistent PortValues → Pass; first divergence → Fail.
check_mixed_both
Tick RTL and one handwritten view; fail when documented ports disagree.
compare_port_values
Compare PortValues on the intersection of keys (FR29: PortValues only, no TLM).
parse_report
reset_then_run
Reset-high one cycle, then n cycles with rst=0.
resolve_vcd2fst
How to obtain FST: never a homegrown writer (AD-24).