Crate bddisasm_sys

Expand description

Rust bindings for bddisasm.

See bddisasm if you’re looking for a Rust wrapper for these bindings.

§Requirements

bindgen is used to generate the bindings at build time. Because of this, users need to have clang installed. Check the bindgen documentation for more information.

Re-exports§

pub use self::_ND_INS_CLASS as ND_INS_CLASS;
pub use self::_ND_INS_SET as ND_INS_SET;
pub use self::_ND_INS_TYPE as ND_INS_CATEGORY;
pub use self::_ND_OPERAND_TYPE as ND_OPERAND_TYPE;
pub use self::_ND_REG_TYPE as ND_REG_TYPE;
pub use self::_ND_OPERAND_ENCODING as ND_OPERAND_ENCODING;
pub use self::_ND_TUPLE as ND_TUPLE;
pub use self::_ND_ROUNDING as ND_ROUNDING;
pub use self::_ND_EX_TYPE as ND_EX_TYPE;
pub use self::_ND_SHSTK_ACCESS as ND_SHSTK_ACCESS;

Structs§

_INSTRUX
_INSTRUX__bindgen_ty_1
_INSTRUX__bindgen_ty_5
_INSTRUX__bindgen_ty_3__bindgen_ty_1
_ND_ACCESS_MAP
_ND_BRANCH_INFO
_ND_CONTEXT
_ND_CPUID_FLAG__bindgen_ty_1
_ND_EVEX__bindgen_ty_1
_ND_FPU_FLAGS
_ND_MODRM__bindgen_ty_1
_ND_OPDESC_ADDRESS
_ND_OPDESC_ADDRESS_NEAR
_ND_OPDESC_CONSTANT
_ND_OPDESC_DEFAULT_FLAGS
_ND_OPDESC_IMMEDIATE
_ND_OPDESC_MEMORY
_ND_OPDESC_MEMORY__bindgen_ty_1__bindgen_ty_1
_ND_OPDESC_MEMORY__bindgen_ty_1__bindgen_ty_2
_ND_OPDESC_REGISTER
_ND_OPDESC_REL_OFFSET
_ND_OPERAND
_ND_OPERAND_ACCESS__bindgen_ty_1
_ND_OPERAND_DECORATOR
_ND_OPERAND_FLAGS__bindgen_ty_1
_ND_OPERAND_RLUT
_ND_REX2__bindgen_ty_1
_ND_REX__bindgen_ty_1
_ND_RFLAGS__bindgen_ty_1
_ND_SIB__bindgen_ty_1
_ND_VALID_DECORATORS__bindgen_ty_1
_ND_VALID_MODES__bindgen_ty_1
_ND_VALID_PREFIXES__bindgen_ty_1
_ND_VEX2__bindgen_ty_1
_ND_VEX3__bindgen_ty_1
_ND_XOP__bindgen_ty_1
__BindgenBitfieldUnit

Enums§

Constants§

NDR_AH
NDR_AL
NDR_AL64
NDR_AX
NDR_BH
NDR_BL
NDR_BL64
NDR_BND0
NDR_BND1
NDR_BND2
NDR_BND3
NDR_BP
NDR_BPL
NDR_BX
NDR_CH
NDR_CL
NDR_CL64
NDR_CR0
NDR_CR1
NDR_CR2
NDR_CR3
NDR_CR4
NDR_CR5
NDR_CR6
NDR_CR7
NDR_CR8
NDR_CR9
NDR_CR10
NDR_CR11
NDR_CR12
NDR_CR13
NDR_CR14
NDR_CR15
NDR_CR16
NDR_CR17
NDR_CR18
NDR_CR19
NDR_CR20
NDR_CR21
NDR_CR22
NDR_CR23
NDR_CR24
NDR_CR25
NDR_CR26
NDR_CR27
NDR_CR28
NDR_CR29
NDR_CR30
NDR_CR31
NDR_CS
NDR_CX
NDR_DH
NDR_DI
NDR_DIL
NDR_DL
NDR_DL64
NDR_DR0
NDR_DR1
NDR_DR2
NDR_DR3
NDR_DR4
NDR_DR5
NDR_DR6
NDR_DR7
NDR_DR8
NDR_DR9
NDR_DR10
NDR_DR11
NDR_DR12
NDR_DR13
NDR_DR14
NDR_DR15
NDR_DR16
NDR_DR17
NDR_DR18
NDR_DR19
NDR_DR20
NDR_DR21
NDR_DR22
NDR_DR23
NDR_DR24
NDR_DR25
NDR_DR26
NDR_DR27
NDR_DR28
NDR_DR29
NDR_DR30
NDR_DR31
NDR_DS
NDR_DX
NDR_EAX
NDR_EBP
NDR_EBX
NDR_ECX
NDR_EDI
NDR_EDX
NDR_ES
NDR_ESI
NDR_ESP
NDR_FS
NDR_GDTR
NDR_GS
NDR_IA32_FMASK
NDR_IA32_FS_BASE
NDR_IA32_GS_BASE
NDR_IA32_KERNEL_GS_BASE
NDR_IA32_LSTAR
NDR_IA32_STAR
NDR_IA32_SYSENTER_CS
NDR_IA32_SYSENTER_EIP
NDR_IA32_SYSENTER_ESP
NDR_IA32_TSC
NDR_IA32_TSC_AUX
NDR_IDTR
NDR_INV6
NDR_INV7
NDR_K0
NDR_K1
NDR_K2
NDR_K3
NDR_K4
NDR_K5
NDR_K6
NDR_K7
NDR_LDTR
NDR_MSR_ANY
NDR_R8
NDR_R9
NDR_R8D
NDR_R8L
NDR_R8W
NDR_R9D
NDR_R9L
NDR_R9W
NDR_R10
NDR_R11
NDR_R12
NDR_R13
NDR_R14
NDR_R15
NDR_R16
NDR_R17
NDR_R18
NDR_R19
NDR_R20
NDR_R21
NDR_R22
NDR_R23
NDR_R24
NDR_R25
NDR_R26
NDR_R27
NDR_R28
NDR_R29
NDR_R30
NDR_R31
NDR_R10D
NDR_R10L
NDR_R10W
NDR_R11D
NDR_R11L
NDR_R11W
NDR_R12D
NDR_R12L
NDR_R12W
NDR_R13D
NDR_R13L
NDR_R13W
NDR_R14D
NDR_R14L
NDR_R14W
NDR_R15D
NDR_R15L
NDR_R15W
NDR_R16D
NDR_R16L
NDR_R16W
NDR_R17D
NDR_R17L
NDR_R17W
NDR_R18D
NDR_R18L
NDR_R18W
NDR_R19D
NDR_R19L
NDR_R19W
NDR_R20D
NDR_R20L
NDR_R20W
NDR_R21D
NDR_R21L
NDR_R21W
NDR_R22D
NDR_R22L
NDR_R22W
NDR_R23D
NDR_R23L
NDR_R23W
NDR_R24D
NDR_R24L
NDR_R24W
NDR_R25D
NDR_R25L
NDR_R25W
NDR_R26D
NDR_R26L
NDR_R26W
NDR_R27D
NDR_R27L
NDR_R27W
NDR_R28D
NDR_R28L
NDR_R28W
NDR_R29D
NDR_R29L
NDR_R29W
NDR_R30D
NDR_R30L
NDR_R30W
NDR_R31D
NDR_R31L
NDR_R31W
NDR_RAX
NDR_RBP
NDR_RBX
NDR_RCX
NDR_RDI
NDR_RDX
NDR_RFLAG_AC
NDR_RFLAG_AF
NDR_RFLAG_CF
NDR_RFLAG_DF
NDR_RFLAG_ID
NDR_RFLAG_IF
NDR_RFLAG_IOPL
NDR_RFLAG_NT
NDR_RFLAG_OF
NDR_RFLAG_PF
NDR_RFLAG_RF
NDR_RFLAG_SF
NDR_RFLAG_TF
NDR_RFLAG_VIF
NDR_RFLAG_VIP
NDR_RFLAG_VM
NDR_RFLAG_ZF
NDR_RSI
NDR_RSP
NDR_SI
NDR_SIL
NDR_SP
NDR_SPL
NDR_SS
NDR_ST0
NDR_ST1
NDR_ST2
NDR_ST3
NDR_ST4
NDR_ST5
NDR_ST6
NDR_ST7
NDR_TR
NDR_TR0
NDR_TR1
NDR_TR2
NDR_TR3
NDR_TR4
NDR_TR5
NDR_TR6
NDR_TR7
NDR_TR8
NDR_TR9
NDR_TR10
NDR_TR11
NDR_TR12
NDR_TR13
NDR_TR14
NDR_TR15
NDR_X87_CONTROL
NDR_X87_STATUS
NDR_X87_TAG
NDR_XCR0
NDR_XCR1
NDR_XCR_ANY
NDR_XMM0
NDR_XMM1
NDR_XMM2
NDR_XMM3
NDR_XMM4
NDR_XMM5
NDR_XMM6
NDR_XMM7
NDR_XMM8
NDR_XMM9
NDR_XMM10
NDR_XMM11
NDR_XMM12
NDR_XMM13
NDR_XMM14
NDR_XMM15
NDR_XMM16
NDR_XMM17
NDR_XMM18
NDR_XMM19
NDR_XMM20
NDR_XMM21
NDR_XMM22
NDR_XMM23
NDR_XMM24
NDR_XMM25
NDR_XMM26
NDR_XMM27
NDR_XMM28
NDR_XMM29
NDR_XMM30
NDR_XMM31
NDR_YMM0
NDR_YMM1
NDR_YMM2
NDR_YMM3
NDR_YMM4
NDR_YMM5
NDR_YMM6
NDR_YMM7
NDR_YMM8
NDR_YMM9
NDR_YMM10
NDR_YMM11
NDR_YMM12
NDR_YMM13
NDR_YMM14
NDR_YMM15
NDR_YMM16
NDR_YMM17
NDR_YMM18
NDR_YMM19
NDR_YMM20
NDR_YMM21
NDR_YMM22
NDR_YMM23
NDR_YMM24
NDR_YMM25
NDR_YMM26
NDR_YMM27
NDR_YMM28
NDR_YMM29
NDR_YMM30
NDR_YMM31
NDR_ZMM0
NDR_ZMM1
NDR_ZMM2
NDR_ZMM3
NDR_ZMM4
NDR_ZMM5
NDR_ZMM6
NDR_ZMM7
NDR_ZMM8
NDR_ZMM9
NDR_ZMM10
NDR_ZMM11
NDR_ZMM12
NDR_ZMM13
NDR_ZMM14
NDR_ZMM15
NDR_ZMM16
NDR_ZMM17
NDR_ZMM18
NDR_ZMM19
NDR_ZMM20
NDR_ZMM21
NDR_ZMM22
NDR_ZMM23
NDR_ZMM24
NDR_ZMM25
NDR_ZMM26
NDR_ZMM27
NDR_ZMM28
NDR_ZMM29
NDR_ZMM30
NDR_ZMM31
ND_ACCESS_ANY_READ
ND_ACCESS_ANY_WRITE
ND_ACCESS_COND_READ
ND_ACCESS_COND_WRITE
ND_ACCESS_NONE
ND_ACCESS_PREFETCH
ND_ACCESS_READ
ND_ACCESS_WRITE
ND_ADDR_16
ND_ADDR_32
ND_ADDR_64
ND_CFF_NO_LEAF
ND_CFF_NO_SUBLEAF
ND_CODE_16
ND_CODE_32
ND_CODE_64
ND_COND_BELOW
ND_COND_BELOW_OR_EQUAL
ND_COND_CARRY
ND_COND_EQUAL
ND_COND_LESS
ND_COND_LESS_OR_EQUAL
ND_COND_NOT_ABOVE
ND_COND_NOT_ABOVE_OR_EQUAL
ND_COND_OVERFLOW
ND_COND_PARITY
ND_COND_SIGN
ND_COND_ZERO
ND_DATA_16
ND_DATA_32
ND_DATA_64
ND_DECO_BROADCAST
ND_DECO_ER
ND_DECO_MASK
ND_DECO_ND
ND_DECO_NF
ND_DECO_SAE
ND_DECO_ZERO
ND_DECO_ZU
ND_ENCM_EVEX
ND_ENCM_LEGACY
ND_ENCM_VEX
ND_ENCM_XOP
ND_EVEXM_COND
ND_EVEXM_EVEX
ND_EVEXM_LEGACY
ND_EVEXM_VEX
ND_FALSE
ND_FEAT_ALL
ND_FEAT_APX
ND_FEAT_CET
ND_FEAT_CLDEMOTE
ND_FEAT_MPX
ND_FEAT_NONE
ND_FEAT_PITI
ND_FLAG_3DNOW
ND_FLAG_AG
ND_FLAG_BITBASE
ND_FLAG_CETT
ND_FLAG_COND
ND_FLAG_D64
ND_FLAG_F64
ND_FLAG_I64
ND_FLAG_I67
ND_FLAG_IER
ND_FLAG_IWO64
ND_FLAG_LIG
ND_FLAG_LOCKSP
ND_FLAG_LOCK_SPECIAL
ND_FLAG_MFR
ND_FLAG_MIB
ND_FLAG_MMASK
ND_FLAG_MODRM
ND_FLAG_NO66
ND_FLAG_NO67
ND_FLAG_NOA16
ND_FLAG_NOL0
ND_FLAG_NOMZ
ND_FLAG_NOREP
ND_FLAG_NOREX2
ND_FLAG_NORIPREL
ND_FLAG_NOV
ND_FLAG_NOVP
ND_FLAG_NO_RIP_REL
ND_FLAG_O64
ND_FLAG_RESERVED0
ND_FLAG_S66
ND_FLAG_SCALABLE
ND_FLAG_SERIAL
ND_FLAG_SHS
ND_FLAG_SIBMEM
ND_FLAG_VECTOR
ND_FLAG_VSIB
ND_FLAG_WIG
ND_FPU_FLAG_MODIFIED
ND_FPU_FLAG_SET_0
ND_FPU_FLAG_SET_1
ND_FPU_FLAG_UNDEFINED
ND_MAX_BND_REGS
ND_MAX_CR_REGS
ND_MAX_DR_REGS
ND_MAX_FPU_REGS
ND_MAX_GPR_REGS
ND_MAX_INSTRUCTION_LENGTH
ND_MAX_MMX_REGS
ND_MAX_MNEMONIC_LENGTH
ND_MAX_MSK_REGS
ND_MAX_OPERAND
ND_MAX_REGISTER_SIZE
ND_MAX_SEG_REGS
ND_MAX_SSE_REGS
ND_MAX_SYS_REGS
ND_MAX_TILE_REGS
ND_MAX_TR_REGS
ND_MAX_X87_REGS
ND_MIN_BUF_SIZE
ND_MOD_ANY
ND_MOD_COMPAT
ND_MOD_LONG
ND_MOD_MODE_MASK
ND_MOD_OTHER_MASK
ND_MOD_PROT
ND_MOD_R0
ND_MOD_R1
ND_MOD_R2
ND_MOD_R3
ND_MOD_REAL
ND_MOD_RING_MASK
ND_MOD_SGX
ND_MOD_SGX_OFF
ND_MOD_SMM
ND_MOD_SMM_OFF
ND_MOD_TSX
ND_MOD_TSX_OFF
ND_MOD_V8086
ND_MOD_VMXN
ND_MOD_VMXN_SEAM
ND_MOD_VMXR
ND_MOD_VMXR_SEAM
ND_MOD_VMX_MASK
ND_MOD_VMX_OFF
ND_OPSZ_16
ND_OPSZ_32
ND_OPSZ_64
ND_OPTION_ONLY_EXPLICIT_OPERANDS
ND_PREFIX_EVEX
ND_PREFIX_G0_LOCK
ND_PREFIX_G1_BND
ND_PREFIX_G1_REPE_REPZ
ND_PREFIX_G1_REPNE_REPNZ
ND_PREFIX_G1_XACQUIRE
ND_PREFIX_G1_XRELEASE
ND_PREFIX_G2_BR_ALT
ND_PREFIX_G2_BR_NOT_TAKEN
ND_PREFIX_G2_BR_TAKEN
ND_PREFIX_G2_NO_TRACK
ND_PREFIX_G2_SEG_CS
ND_PREFIX_G2_SEG_DS
ND_PREFIX_G2_SEG_ES
ND_PREFIX_G2_SEG_FS
ND_PREFIX_G2_SEG_GS
ND_PREFIX_G2_SEG_SS
ND_PREFIX_G3_OPERAND_SIZE
ND_PREFIX_G4_ADDR_SIZE
ND_PREFIX_REX2
ND_PREFIX_REX_MAX
ND_PREFIX_REX_MIN
ND_PREFIX_VEX_2B
ND_PREFIX_VEX_3B
ND_PREFIX_XOP
ND_PREF_BH
ND_PREF_BHINT
ND_PREF_BND
ND_PREF_DNT
ND_PREF_HLE
ND_PREF_HLEWOL
ND_PREF_HLE_WO_LOCK
ND_PREF_LOCK
ND_PREF_REP
ND_PREF_REPC
ND_PREF_XACQUIRE
ND_PREF_XRELEASE
ND_SIZE_1KB
ND_SIZE_8BIT
ND_SIZE_16BIT
ND_SIZE_32BIT
ND_SIZE_48BIT
ND_SIZE_64BIT
ND_SIZE_80BIT
ND_SIZE_112BIT
ND_SIZE_128BIT
ND_SIZE_224BIT
ND_SIZE_256BIT
ND_SIZE_384BIT
ND_SIZE_512BIT
ND_SIZE_752BIT
ND_SIZE_864BIT
ND_SIZE_4096BIT
ND_SIZE_CACHE_LINE
ND_SIZE_UNKNOWN
ND_STACK_16
ND_STACK_32
ND_STACK_64
ND_STATUS_16_BIT_ADDRESSING_NOT_SUPPORTED
ND_STATUS_66_NOT_ACCEPTED
ND_STATUS_BAD_EVEX_LL
ND_STATUS_BAD_EVEX_V_PRIME
ND_STATUS_BAD_LOCK_PREFIX
ND_STATUS_BROADCAST_NOT_SUPPORTED
ND_STATUS_BUFFER_OVERFLOW
ND_STATUS_BUFFER_TOO_SMALL
ND_STATUS_CS_LOAD
ND_STATUS_ER_SAE_NOT_SUPPORTED
ND_STATUS_EVEX_WITH_PREFIX
ND_STATUS_HINT_OPERAND_NOT_USED
ND_STATUS_INSTRUCTION_TOO_LONG
ND_STATUS_INTERNAL_ERROR
ND_STATUS_INVALID_DEST_REGS
ND_STATUS_INVALID_ENCODING
ND_STATUS_INVALID_ENCODING_IN_MODE
ND_STATUS_INVALID_EVEX_BYTE3
ND_STATUS_INVALID_INSTRUX
ND_STATUS_INVALID_PARAMETER
ND_STATUS_INVALID_PREFIX_SEQUENCE
ND_STATUS_INVALID_REGISTER_IN_INSTRUCTION
ND_STATUS_INVALID_TILE_REGS
ND_STATUS_INVALID_VSIB_REGS
ND_STATUS_MASK_NOT_SUPPORTED
ND_STATUS_MASK_REQUIRED
ND_STATUS_RIP_REL_ADDRESSING_NOT_SUPPORTED
ND_STATUS_SIBMEM_WITHOUT_SIB
ND_STATUS_SUCCESS
ND_STATUS_VEX_VVVV_MUST_BE_ZERO
ND_STATUS_VEX_WITH_PREFIX
ND_STATUS_VSIB_WITHOUT_SIB
ND_STATUS_XOP_WITH_PREFIX
ND_STATUS_ZEROING_NOT_SUPPORTED
ND_STATUS_ZEROING_NO_MASK
ND_STATUS_ZEROING_ON_MEMORY
ND_TRUE
ND_VECM_128
ND_VECM_256
ND_VECM_512
ND_VEND_AMD
ND_VEND_ANY
ND_VEND_INTEL
ND_VEND_MAX
ND_VEXM_2B
ND_VEXM_3B

Functions§

NdDecode^⚠
NdDecodeEx^⚠
NdDecodeEx2^⚠
NdDecodeWithContext^⚠
NdGetFullAccessMap^⚠
NdGetOperandRlut^⚠
NdGetVersion^⚠
NdInitContext^⚠
NdIsInstruxRipRelative^⚠
NdToText^⚠

Crate bddisasm_sys

Crate bddisasm_sys

§Requirements

Re-exports§

Structs§

Enums§

Constants§

Functions§

Type Aliases§

Unions§

Crate bddisasm_sys

Crate bddisasm_sys Copy item path

§Requirements

Re-exports§

Structs§

Enums§

Constants§

Functions§

Type Aliases§

Unions§

Crate bddisasm_sys