bcm2835_lpa/
spi0.rs

1#[doc = r"Register block"]
2#[repr(C)]
3#[derive(Debug)]
4pub struct RegisterBlock {
5    cs: CS,
6    fifo: FIFO,
7    clk: CLK,
8    dlen: DLEN,
9    ltoh: LTOH,
10    dc: DC,
11}
12impl RegisterBlock {
13    #[doc = "0x00 - Control and Status"]
14    #[inline(always)]
15    pub const fn cs(&self) -> &CS {
16        &self.cs
17    }
18    #[doc = "0x04 - FIFO access"]
19    #[inline(always)]
20    pub const fn fifo(&self) -> &FIFO {
21        &self.fifo
22    }
23    #[doc = "0x08 - Clock divider"]
24    #[inline(always)]
25    pub const fn clk(&self) -> &CLK {
26        &self.clk
27    }
28    #[doc = "0x0c - Data length"]
29    #[inline(always)]
30    pub const fn dlen(&self) -> &DLEN {
31        &self.dlen
32    }
33    #[doc = "0x10 - LoSSI output hold delay"]
34    #[inline(always)]
35    pub const fn ltoh(&self) -> &LTOH {
36        &self.ltoh
37    }
38    #[doc = "0x14 - "]
39    #[inline(always)]
40    pub const fn dc(&self) -> &DC {
41        &self.dc
42    }
43}
44#[doc = "CS (rw) register accessor: Control and Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cs::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cs`]
45module"]
46pub type CS = crate::Reg<cs::CS_SPEC>;
47#[doc = "Control and Status"]
48pub mod cs;
49#[doc = "FIFO (rw) register accessor: FIFO access\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fifo::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fifo`]
50module"]
51pub type FIFO = crate::Reg<fifo::FIFO_SPEC>;
52#[doc = "FIFO access"]
53pub mod fifo;
54#[doc = "CLK (rw) register accessor: Clock divider\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clk::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk`]
55module"]
56pub type CLK = crate::Reg<clk::CLK_SPEC>;
57#[doc = "Clock divider"]
58pub mod clk;
59#[doc = "DLEN (rw) register accessor: Data length\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dlen::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dlen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dlen`]
60module"]
61pub type DLEN = crate::Reg<dlen::DLEN_SPEC>;
62#[doc = "Data length"]
63pub mod dlen;
64#[doc = "LTOH (rw) register accessor: LoSSI output hold delay\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ltoh::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ltoh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ltoh`]
65module"]
66pub type LTOH = crate::Reg<ltoh::LTOH_SPEC>;
67#[doc = "LoSSI output hold delay"]
68pub mod ltoh;
69#[doc = "DC (rw) register accessor: \n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc`]
70module"]
71pub type DC = crate::Reg<dc::DC_SPEC>;
72#[doc = ""]
73pub mod dc;
bcm2835_lpa/spi0.rs

bcm2835_lpa/
spi0.rs
