Crate axi_uart16550 

AMD AXI UART16550 driver

This is a native Rust driver for the AMD AXI UART16550 IP core.

Features

If asynchronous TX operations are used, the number of wakers which defaults to 1 waker can also be configured. The tx_async module provides more details on the meaning of this number.

• 1-waker which is also a default feature
• 2-wakers
• 4-wakers
• 8-wakers
• 16-wakers
• 32-wakers

Re-exports

pub use tx::*;

pub use tx_async::*;

pub use rx::*;

Modules

registers

Raw register module

rx

Receiver (RX) support module

tx

Transmitter (TX) support module

tx_async

Asynchronous TX support.

Structs

AxiUart16550

AXI UART16550 peripheral driver.

ClockConfig

Clock configuration structure.

DivisorZeroError

Divisor is zero error.

UartConfig

UART configuration structure.

Enums

ClockConfigError

If this error occurs, the calculated baudrate divisor is too large, either because the used clock is too large, or the baudrate is too slow for the used clock frequency.

Parity

Parity configuration.

Constants

DEFAULT_RX_TRIGGER_LEVEL

Default RX FIFO trigger level.

FIFO_DEPTH

Maximum FIFO depth of the AXI UART16550.

Functions

calculate_error_rate_from_div

Calculate the error rate of the baudrate with the given clock frequency, baudrate and divisor as a floating point value between 0.0 and 1.0.