Module cache 

CPU cache maintenance.

Structs

CacheRange

A checked virtual byte range. Construction validates arithmetic, not mapping.

CacheRangeOverflow

The requested cache byte range wraps the CPU address space.

Enums

DataCacheOperation

Data-cache maintenance performed to the point of coherency.

Functions

clean_dcache_range_to_pou^⚠

Cleans the checked range to the point of unification and completes the writes. Call flush_icache_all before executing the modified instructions.

dcache_line_size_from_ctr

Reads the data cache line size from CTR_EL0 and returns it in bytes.

flush_icache_all

Invalidates instruction caches in the Inner Shareable domain. Modified bytes must first be cleaned to PoU; remote execution must cross a context-synchronization event (such as exception return) after publication.

icache_line_size_from_ctr

Reads the instruction cache line size from CTR_EL0 and returns it in bytes.

maintain_dcache_to_poc^⚠

Maintains every cache line intersecting a checked virtual byte range. Completion includes a system DSB and instruction synchronization.

sync_kernel_text

Completes local translation and instruction synchronization for modified text. The owner must first publish the modified bytes using clean_dcache_range_to_pou, and coordinate any other CPUs executing this text.