ax_cpu/arch/aarch64/pmu/
capability.rs

1//! Per-CPU PMUv3 capabilities, following Linux arm_pmuv3.c probe semantics.
2
3/// Architectural evidence for an event encoding.
4#[derive(Clone, Copy, Debug, Eq, PartialEq)]
5pub enum EventSupport {
6    /// The architecture reports the event as implemented.
7    Supported,
8    /// The architecture reports the event as absent.
9    Unsupported,
10    /// The encoding is outside the architectural identification bitmaps.
11    ImplementationDefined,
12}
13
14/// Immutable capabilities observed on one CPU.
15#[derive(Clone, Copy, Debug, Eq, PartialEq)]
16pub struct PmuInfo {
17    /// MIDR of the CPU owning this PMU capability snapshot.
18    pub midr: u64,
19    /// ID_AA64DFR0_EL1.PMUVer encoding.
20    pub version: u8,
21    /// Number of programmable counters, excluding fixed cycle/instruction counters.
22    pub num_counters: usize,
23    /// ID_AA64DFR1_EL1.PMICNTR reports a dedicated instruction counter.
24    /// This is independent of the PMUVer encoding.
25    pub has_instruction_counter: bool,
26    /// Currently configured programmable-counter overflow width.
27    pub counter_width: u8,
28    /// Currently configured cycle-counter overflow width.
29    pub cycle_counter_width: u8,
30    /// Full PMCEID0, including the extended common-event bits.
31    pub pmceid0: u64,
32    /// Full PMCEID1, including the extended common-event bits.
33    pub pmceid1: u64,
34}
35
36impl PmuInfo {
37    /// Reports PMUv3p5 long programmable-counter support.
38    pub const fn has_long_counters(self) -> bool {
39        self.version >= 6
40    }
41
42    /// Queries the common and extended common-event identification bitmaps.
43    pub const fn event_support(self, event: u16) -> EventSupport {
44        let (bitmap, bit) = match event {
45            0x0000..=0x001f => (self.pmceid0, event),
46            0x0020..=0x003f => (self.pmceid1, event - 0x20),
47            0x4000..=0x401f => (self.pmceid0, event - 0x4000 + 32),
48            0x4020..=0x403f => (self.pmceid1, event - 0x4020 + 32),
49            _ => return EventSupport::ImplementationDefined,
50        };
51        if bitmap & (1u64 << bit) != 0 {
52            EventSupport::Supported
53        } else {
54            EventSupport::Unsupported
55        }
56    }
57}
ax_cpu/arch/aarch64/pmu/capability.rs

ax_cpu/arch/aarch64/pmu/
capability.rs
