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ax_cpu/arch/x86_64/
entry_state.rs

1//! CPU-owned register cache layout embedded in runtime-provided storage.
2
3/// CPU-owned physical userspace register image.
4#[repr(C)]
5#[derive(Default)]
6pub struct CpuEntryState {
7    pub(super) fs_base: usize,
8    pub(super) gs_base: usize,
9    pub(super) tls_generation: usize,
10    pub(super) user_fp_owner: usize,
11    pub(super) xsave_config: usize,
12}