Module cache 

CPU cache maintenance.

Structs

CacheRange

A checked virtual byte range. Construction validates arithmetic, not mapping.

CacheRangeOverflow

The requested cache byte range wraps the CPU address space.

Functions

clean_dcache_range_to_pou^⚠

Completes data-side preparation for subsequent local instruction synchronization. This architecture needs no separate data-cache clean for coherent CPU stores; callers must still perform flush_icache_all before executing modified text.

flush_icache_all

Serializes this CPU’s instruction stream after coherent text publication. Other executing CPUs require their own synchronized invocation.

sync_kernel_text

Completes local translation and instruction synchronization for modified text. The owner must first publish the modified bytes using clean_dcache_range_to_pou, and coordinate any other CPUs executing this text.