Module cpuint
Source Expand description
- ctrla
- Control A
- lvl0pri
- Interrupt Level 0 Priority
- lvl1vec
- Interrupt Level 1 Priority Vector
- status
- Status
- RegisterBlock
- Register block
- CTRLA
- CTRLA (rw) register accessor: Control A
- LVL0PRI
- LVL0PRI (rw) register accessor: Interrupt Level 0 Priority
- LVL1VEC
- LVL1VEC (rw) register accessor: Interrupt Level 1 Priority Vector
- STATUS
- STATUS (rw) register accessor: Status