avr_device/devices/atmega4809/adc0/
ctrla.rs

1#[doc = "Register `CTRLA` reader"]
2pub struct R(crate::R<CTRLA_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRLA_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRLA_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRLA` writer"]
17pub struct W(crate::W<CTRLA_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRLA_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRLA_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ENABLE` reader - ADC Enable"]
38pub type ENABLE_R = crate::BitReader<bool>;
39#[doc = "Field `ENABLE` writer - ADC Enable"]
40pub type ENABLE_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
41#[doc = "Field `FREERUN` reader - ADC Freerun mode"]
42pub type FREERUN_R = crate::BitReader<bool>;
43#[doc = "Field `FREERUN` writer - ADC Freerun mode"]
44pub type FREERUN_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
45#[doc = "Field `RESSEL` reader - ADC Resolution"]
46pub type RESSEL_R = crate::BitReader<RESSEL_A>;
47#[doc = "ADC Resolution\n\nValue on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49pub enum RESSEL_A {
50    #[doc = "0: 10-bit mode"]
51    _10BIT = 0,
52    #[doc = "1: 8-bit mode"]
53    _8BIT = 1,
54}
55impl From<RESSEL_A> for bool {
56    #[inline(always)]
57    fn from(variant: RESSEL_A) -> Self {
58        variant as u8 != 0
59    }
60}
61impl RESSEL_R {
62    #[doc = "Get enumerated values variant"]
63    #[inline(always)]
64    pub fn variant(&self) -> RESSEL_A {
65        match self.bits {
66            false => RESSEL_A::_10BIT,
67            true => RESSEL_A::_8BIT,
68        }
69    }
70    #[doc = "Checks if the value of the field is `_10BIT`"]
71    #[inline(always)]
72    pub fn is_10bit(&self) -> bool {
73        *self == RESSEL_A::_10BIT
74    }
75    #[doc = "Checks if the value of the field is `_8BIT`"]
76    #[inline(always)]
77    pub fn is_8bit(&self) -> bool {
78        *self == RESSEL_A::_8BIT
79    }
80}
81#[doc = "Field `RESSEL` writer - ADC Resolution"]
82pub type RESSEL_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, RESSEL_A, O>;
83impl<'a, const O: u8> RESSEL_W<'a, O> {
84    #[doc = "10-bit mode"]
85    #[inline(always)]
86    pub fn _10bit(self) -> &'a mut W {
87        self.variant(RESSEL_A::_10BIT)
88    }
89    #[doc = "8-bit mode"]
90    #[inline(always)]
91    pub fn _8bit(self) -> &'a mut W {
92        self.variant(RESSEL_A::_8BIT)
93    }
94}
95#[doc = "Field `RUNSTBY` reader - Run standby mode"]
96pub type RUNSTBY_R = crate::BitReader<bool>;
97#[doc = "Field `RUNSTBY` writer - Run standby mode"]
98pub type RUNSTBY_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
99impl R {
100    #[doc = "Bit 0 - ADC Enable"]
101    #[inline(always)]
102    pub fn enable(&self) -> ENABLE_R {
103        ENABLE_R::new((self.bits & 1) != 0)
104    }
105    #[doc = "Bit 1 - ADC Freerun mode"]
106    #[inline(always)]
107    pub fn freerun(&self) -> FREERUN_R {
108        FREERUN_R::new(((self.bits >> 1) & 1) != 0)
109    }
110    #[doc = "Bit 2 - ADC Resolution"]
111    #[inline(always)]
112    pub fn ressel(&self) -> RESSEL_R {
113        RESSEL_R::new(((self.bits >> 2) & 1) != 0)
114    }
115    #[doc = "Bit 7 - Run standby mode"]
116    #[inline(always)]
117    pub fn runstby(&self) -> RUNSTBY_R {
118        RUNSTBY_R::new(((self.bits >> 7) & 1) != 0)
119    }
120}
121impl W {
122    #[doc = "Bit 0 - ADC Enable"]
123    #[inline(always)]
124    #[must_use]
125    pub fn enable(&mut self) -> ENABLE_W<0> {
126        ENABLE_W::new(self)
127    }
128    #[doc = "Bit 1 - ADC Freerun mode"]
129    #[inline(always)]
130    #[must_use]
131    pub fn freerun(&mut self) -> FREERUN_W<1> {
132        FREERUN_W::new(self)
133    }
134    #[doc = "Bit 2 - ADC Resolution"]
135    #[inline(always)]
136    #[must_use]
137    pub fn ressel(&mut self) -> RESSEL_W<2> {
138        RESSEL_W::new(self)
139    }
140    #[doc = "Bit 7 - Run standby mode"]
141    #[inline(always)]
142    #[must_use]
143    pub fn runstby(&mut self) -> RUNSTBY_W<7> {
144        RUNSTBY_W::new(self)
145    }
146    #[doc = "Writes raw bits to the register."]
147    #[inline(always)]
148    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
149        self.0.bits(bits);
150        self
151    }
152}
153#[doc = "Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
154pub struct CTRLA_SPEC;
155impl crate::RegisterSpec for CTRLA_SPEC {
156    type Ux = u8;
157}
158#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
159impl crate::Readable for CTRLA_SPEC {
160    type Reader = R;
161}
162#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
163impl crate::Writable for CTRLA_SPEC {
164    type Writer = W;
165    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
166    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
167}
168#[doc = "`reset()` method sets CTRLA to value 0"]
169impl crate::Resettable for CTRLA_SPEC {
170    const RESET_VALUE: Self::Ux = 0;
171}