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#[doc = "Register `MCUCR` reader"] pub struct R(crate::R<MCUCR_SPEC>); impl core::ops::Deref for R { type Target = crate::R<MCUCR_SPEC>; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::convert::From<crate::R<MCUCR_SPEC>> for R { fn from(reader: crate::R<MCUCR_SPEC>) -> Self { R(reader) } } #[doc = "Register `MCUCR` writer"] pub struct W(crate::W<MCUCR_SPEC>); impl core::ops::Deref for W { type Target = crate::W<MCUCR_SPEC>; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl core::convert::From<crate::W<MCUCR_SPEC>> for W { fn from(writer: crate::W<MCUCR_SPEC>) -> Self { W(writer) } } #[doc = "Interrupt Sense Control 0 Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ISC00_A { #[doc = "0: Low Level of INTX"] VAL_0X00 = 0, #[doc = "1: Any Logical Change of INTX"] VAL_0X01 = 1, } impl From<ISC00_A> for bool { #[inline(always)] fn from(variant: ISC00_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ISC00` reader - Interrupt Sense Control 0 Bit 0"] pub struct ISC00_R(crate::FieldReader<bool, ISC00_A>); impl ISC00_R { pub(crate) fn new(bits: bool) -> Self { ISC00_R(crate::FieldReader::new(bits)) } #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> ISC00_A { match self.bits { false => ISC00_A::VAL_0X00, true => ISC00_A::VAL_0X01, } } #[doc = "Checks if the value of the field is `VAL_0X00`"] #[inline(always)] pub fn is_val_0x00(&self) -> bool { **self == ISC00_A::VAL_0X00 } #[doc = "Checks if the value of the field is `VAL_0X01`"] #[inline(always)] pub fn is_val_0x01(&self) -> bool { **self == ISC00_A::VAL_0X01 } } impl core::ops::Deref for ISC00_R { type Target = crate::FieldReader<bool, ISC00_A>; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISC00` writer - Interrupt Sense Control 0 Bit 0"] pub struct ISC00_W<'a> { w: &'a mut W, } impl<'a> ISC00_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ISC00_A) -> &'a mut W { self.bit(variant.into()) } #[doc = "Low Level of INTX"] #[inline(always)] pub fn val_0x00(self) -> &'a mut W { self.variant(ISC00_A::VAL_0X00) } #[doc = "Any Logical Change of INTX"] #[inline(always)] pub fn val_0x01(self) -> &'a mut W { self.variant(ISC00_A::VAL_0X01) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01); self.w } } #[doc = "Field `ISC01` reader - Interrupt Sense Control 0 Bit 1"] pub struct ISC01_R(crate::FieldReader<bool, bool>); impl ISC01_R { pub(crate) fn new(bits: bool) -> Self { ISC01_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISC01_R { type Target = crate::FieldReader<bool, bool>; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISC01` writer - Interrupt Sense Control 0 Bit 1"] pub struct ISC01_W<'a> { w: &'a mut W, } impl<'a> ISC01_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1); self.w } } impl R { #[doc = "Bit 0 - Interrupt Sense Control 0 Bit 0"] #[inline(always)] pub fn isc00(&self) -> ISC00_R { ISC00_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Interrupt Sense Control 0 Bit 1"] #[inline(always)] pub fn isc01(&self) -> ISC01_R { ISC01_R::new(((self.bits >> 1) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Interrupt Sense Control 0 Bit 0"] #[inline(always)] pub fn isc00(&mut self) -> ISC00_W { ISC00_W { w: self } } #[doc = "Bit 1 - Interrupt Sense Control 0 Bit 1"] #[inline(always)] pub fn isc01(&mut self) -> ISC01_W { ISC01_W { w: self } } #[doc = "Writes raw bits to the register."] pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { self.0.bits(bits); self } } #[doc = "MCU Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mcucr](index.html) module"] pub struct MCUCR_SPEC; impl crate::RegisterSpec for MCUCR_SPEC { type Ux = u8; } #[doc = "`read()` method returns [mcucr::R](R) reader structure"] impl crate::Readable for MCUCR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [mcucr::W](W) writer structure"] impl crate::Writable for MCUCR_SPEC { type Writer = W; } #[doc = "`reset()` method sets MCUCR to value 0"] impl crate::Resettable for MCUCR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } }