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#[doc = r"Enumeration of all the interrupts."]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[repr(u16)]
pub enum Interrupt {
    #[doc = "1 - <TBD>"]
    CRCSCAN_NMI = 1,
    #[doc = "2 - <TBD>"]
    BOD_VLM = 2,
    #[doc = "3 - <TBD>"]
    RTC_CNT = 3,
    #[doc = "4 - <TBD>"]
    RTC_PIT = 4,
    #[doc = "5 - <TBD>"]
    CCL_CCL = 5,
    #[doc = "6 - <TBD>"]
    PORTA_PORT = 6,
    #[doc = "7 - <TBD>"]
    TCA0_LUNF_OVF = 7,
    #[doc = "8 - <TBD>"]
    TCA0_HUNF = 8,
    #[doc = "9 - <TBD>"]
    TCA0_CMP0_LCMP0 = 9,
    #[doc = "10 - <TBD>"]
    TCA0_CMP1_LCMP1 = 10,
    #[doc = "11 - <TBD>"]
    TCA0_CMP2_LCMP2 = 11,
    #[doc = "12 - <TBD>"]
    TCB0_INT = 12,
    #[doc = "13 - <TBD>"]
    TCB1_INT = 13,
    #[doc = "14 - <TBD>"]
    TWI0_TWIS = 14,
    #[doc = "15 - <TBD>"]
    TWI0_TWIM = 15,
    #[doc = "16 - <TBD>"]
    SPI0_INT = 16,
    #[doc = "17 - <TBD>"]
    USART0_RXC = 17,
    #[doc = "18 - <TBD>"]
    USART0_DRE = 18,
    #[doc = "19 - <TBD>"]
    USART0_TXC = 19,
    #[doc = "20 - <TBD>"]
    PORTD_PORT = 20,
    #[doc = "21 - <TBD>"]
    AC0_AC = 21,
    #[doc = "22 - <TBD>"]
    ADC0_RESRDY = 22,
    #[doc = "23 - <TBD>"]
    ADC0_WCOMP = 23,
    #[doc = "24 - <TBD>"]
    PORTC_PORT = 24,
    #[doc = "25 - <TBD>"]
    TCB2_INT = 25,
    #[doc = "26 - <TBD>"]
    USART1_RXC = 26,
    #[doc = "27 - <TBD>"]
    USART1_DRE = 27,
    #[doc = "28 - <TBD>"]
    USART1_TXC = 28,
    #[doc = "29 - <TBD>"]
    PORTF_PORT = 29,
    #[doc = "30 - <TBD>"]
    NVMCTRL_EE = 30,
    #[doc = "31 - <TBD>"]
    USART2_RXC = 31,
    #[doc = "32 - <TBD>"]
    USART2_DRE = 32,
    #[doc = "33 - <TBD>"]
    USART2_TXC = 33,
    #[doc = "34 - <TBD>"]
    PORTB_PORT = 34,
    #[doc = "35 - <TBD>"]
    PORTE_PORT = 35,
    #[doc = "36 - <TBD>"]
    TCB3_INT = 36,
    #[doc = "37 - <TBD>"]
    USART3_RXC = 37,
    #[doc = "38 - <TBD>"]
    USART3_DRE = 38,
    #[doc = "39 - <TBD>"]
    USART3_TXC = 39,
}
#[derive(Debug, Copy, Clone)]
pub struct TryFromInterruptError(());
impl Interrupt {
    #[inline]
    pub fn try_from(value: u8) -> Result<Self, TryFromInterruptError> {
        match value {
            1 => Ok(Interrupt::CRCSCAN_NMI),
            2 => Ok(Interrupt::BOD_VLM),
            3 => Ok(Interrupt::RTC_CNT),
            4 => Ok(Interrupt::RTC_PIT),
            5 => Ok(Interrupt::CCL_CCL),
            6 => Ok(Interrupt::PORTA_PORT),
            7 => Ok(Interrupt::TCA0_LUNF_OVF),
            8 => Ok(Interrupt::TCA0_HUNF),
            9 => Ok(Interrupt::TCA0_CMP0_LCMP0),
            10 => Ok(Interrupt::TCA0_CMP1_LCMP1),
            11 => Ok(Interrupt::TCA0_CMP2_LCMP2),
            12 => Ok(Interrupt::TCB0_INT),
            13 => Ok(Interrupt::TCB1_INT),
            14 => Ok(Interrupt::TWI0_TWIS),
            15 => Ok(Interrupt::TWI0_TWIM),
            16 => Ok(Interrupt::SPI0_INT),
            17 => Ok(Interrupt::USART0_RXC),
            18 => Ok(Interrupt::USART0_DRE),
            19 => Ok(Interrupt::USART0_TXC),
            20 => Ok(Interrupt::PORTD_PORT),
            21 => Ok(Interrupt::AC0_AC),
            22 => Ok(Interrupt::ADC0_RESRDY),
            23 => Ok(Interrupt::ADC0_WCOMP),
            24 => Ok(Interrupt::PORTC_PORT),
            25 => Ok(Interrupt::TCB2_INT),
            26 => Ok(Interrupt::USART1_RXC),
            27 => Ok(Interrupt::USART1_DRE),
            28 => Ok(Interrupt::USART1_TXC),
            29 => Ok(Interrupt::PORTF_PORT),
            30 => Ok(Interrupt::NVMCTRL_EE),
            31 => Ok(Interrupt::USART2_RXC),
            32 => Ok(Interrupt::USART2_DRE),
            33 => Ok(Interrupt::USART2_TXC),
            34 => Ok(Interrupt::PORTB_PORT),
            35 => Ok(Interrupt::PORTE_PORT),
            36 => Ok(Interrupt::TCB3_INT),
            37 => Ok(Interrupt::USART3_RXC),
            38 => Ok(Interrupt::USART3_DRE),
            39 => Ok(Interrupt::USART3_TXC),
            _ => Err(TryFromInterruptError(())),
        }
    }
}