1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97
#[doc = "Register `TCCR2C` writer"] pub struct W(crate::W<TCCR2C_SPEC>); impl core::ops::Deref for W { type Target = crate::W<TCCR2C_SPEC>; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl core::convert::From<crate::W<TCCR2C_SPEC>> for W { fn from(writer: crate::W<TCCR2C_SPEC>) -> Self { W(writer) } } #[doc = "Field `FOC2B` writer - Force Output Compare for Channel B"] pub struct FOC2B_W<'a> { w: &'a mut W, } impl<'a> FOC2B_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6); self.w } } #[doc = "Field `FOC2A` writer - Force Output Compare for Channel A"] pub struct FOC2A_W<'a> { w: &'a mut W, } impl<'a> FOC2A_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7); self.w } } impl W { #[doc = "Bit 6 - Force Output Compare for Channel B"] #[inline(always)] pub fn foc2b(&mut self) -> FOC2B_W { FOC2B_W { w: self } } #[doc = "Bit 7 - Force Output Compare for Channel A"] #[inline(always)] pub fn foc2a(&mut self) -> FOC2A_W { FOC2A_W { w: self } } #[doc = "Writes raw bits to the register."] pub unsafe fn bits(&mut self, bits: u8) -> &mut Self { self.0.bits(bits); self } } #[doc = "Timer/Counter2 Control Register C\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tccr2c](index.html) module"] pub struct TCCR2C_SPEC; impl crate::RegisterSpec for TCCR2C_SPEC { type Ux = u8; } #[doc = "`write(|w| ..)` method takes [tccr2c::W](W) writer structure"] impl crate::Writable for TCCR2C_SPEC { type Writer = W; } #[doc = "`reset()` method sets TCCR2C to value 0"] impl crate::Resettable for TCCR2C_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } }