autd3_firmware_emulator/fpga/emulator/
gpio_out.rs1use super::{super::params::*, FPGAEmulator};
2
3impl FPGAEmulator {
4 #[must_use]
5 pub fn gpio_in(&self) -> [bool; 4] {
6 [
7 (self.mem.controller_bram.read(ADDR_CTL_FLAG) & (1 << CTL_FLAG_BIT_GPIO_IN_0)) != 0,
8 (self.mem.controller_bram.read(ADDR_CTL_FLAG) & (1 << (CTL_FLAG_BIT_GPIO_IN_1))) != 0,
9 (self.mem.controller_bram.read(ADDR_CTL_FLAG) & (1 << (CTL_FLAG_BIT_GPIO_IN_2))) != 0,
10 (self.mem.controller_bram.read(ADDR_CTL_FLAG) & (1 << (CTL_FLAG_BIT_GPIO_IN_3))) != 0,
11 ]
12 }
13
14 #[must_use]
15 pub fn gpio_out_types(&self) -> [u8; 4] {
16 [
17 (self.mem.controller_bram.read(ADDR_DEBUG_VALUE0_3) >> 8) as _,
18 (self.mem.controller_bram.read(ADDR_DEBUG_VALUE1_3) >> 8) as _,
19 (self.mem.controller_bram.read(ADDR_DEBUG_VALUE2_3) >> 8) as _,
20 (self.mem.controller_bram.read(ADDR_DEBUG_VALUE3_3) >> 8) as _,
21 ]
22 }
23
24 #[must_use]
25 pub fn gpio_out_values(&self) -> [u64; 4] {
26 [
27 self.mem
28 .controller_bram
29 .read_bram_as::<u64>(ADDR_DEBUG_VALUE0_0)
30 & 0x00FF_FFFF_FFFF_FFFF,
31 self.mem
32 .controller_bram
33 .read_bram_as::<u64>(ADDR_DEBUG_VALUE1_0)
34 & 0x00FF_FFFF_FFFF_FFFF,
35 self.mem
36 .controller_bram
37 .read_bram_as::<u64>(ADDR_DEBUG_VALUE2_0)
38 & 0x00FF_FFFF_FFFF_FFFF,
39 self.mem
40 .controller_bram
41 .read_bram_as::<u64>(ADDR_DEBUG_VALUE3_0)
42 & 0x00FF_FFFF_FFFF_FFFF,
43 ]
44 }
45}